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2015 International Symposium on Next-Generation Electronics (ISNE)最新文献

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The integration process of W-plug landing on Cu line in 28nm-node flash memory and beyond 28nm及以上节点闪存中w插头落在Cu线上的集成过程
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7131983
Y. Lu, Wei-Lin Wang, Pei-Chia Chen, C. Lai, Hao-Tang Hsu, Chia-Yu Li, Chih-Yuan Chen, L. Young, M. Yeh, Hsien-Chang Kuo, Hung-Ju Chien, T. Ying
{"title":"The integration process of W-plug landing on Cu line in 28nm-node flash memory and beyond","authors":"Y. Lu, Wei-Lin Wang, Pei-Chia Chen, C. Lai, Hao-Tang Hsu, Chia-Yu Li, Chih-Yuan Chen, L. Young, M. Yeh, Hsien-Chang Kuo, Hung-Ju Chien, T. Ying","doi":"10.1109/ISNE.2015.7131983","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7131983","url":null,"abstract":"The integration process of W-plug landing on Cu line has been investigated systematically step-by-step. The process is divided into four steps, including pre-clean, Ti, TiN, and W depositions. The over-all contact resistance of the structure is successfully reduced by reactive plasma treatment for pre-clean, Ti deposition, adding the cycles of plasma treatment for TiN by metal organic chemical vapor deposition, and increasing the temperature of W deposition.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127923941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Wavelength dependence of trapping efficiency in optical tweezers 光镊捕获效率的波长依赖性
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7131986
Shih‐Kun Liu, Wenting Hsieh, Wei-Yi Sung, Yong-Jai Shen, Chia-Ching Tsai, Fong-Min Hsu
{"title":"Wavelength dependence of trapping efficiency in optical tweezers","authors":"Shih‐Kun Liu, Wenting Hsieh, Wei-Yi Sung, Yong-Jai Shen, Chia-Ching Tsai, Fong-Min Hsu","doi":"10.1109/ISNE.2015.7131986","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7131986","url":null,"abstract":"In this paper, the trapping efficiencies of the optical tweezer with different laser wavelength are studied by capturing a microparticle. The best trapping efficiency of the optical trapping occurs at the wavelength of 532 nm. In addition, the experiment of trapping yeast is also conducted at the wavelength of 650 nm. The corresponding trapping efficiency is found to be 2.80 %.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115812836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Mirror-tunable laser interference lithography system for wafer-scale patterning with flexible periodicity 具有柔性周期的圆片尺度图案的镜面可调谐激光干涉光刻系统
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7132041
Yu-Nung Lin, Y. Hung, Chia-Wei Huang, P. Chang
{"title":"Mirror-tunable laser interference lithography system for wafer-scale patterning with flexible periodicity","authors":"Yu-Nung Lin, Y. Hung, Chia-Wei Huang, P. Chang","doi":"10.1109/ISNE.2015.7132041","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7132041","url":null,"abstract":"We propose and experimentally demonstrate a compact and cost-effective mirror-tunable laser interference lithography system to generate submicron grating structures with flexible periodicity. This system also enables a large-area illumination coverage that is not limited by the mirror size. Proof-of-concept demonstrations verify that this system is capable of generating 360-nm and 880-nm spaced gratings over a large 4-inch sample area without requiring optical path reconfiguration, thus is suitable for the realization of high-index-contrast grating mirrors used for a wide wavelength range.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131975543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Low-temperature direct wafer bonding for III-V compound semiconductors to nanometer-scale grating arrays III-V型化合物半导体与纳米级光栅阵列的低温直接晶圆键合
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7132038
Bai-Ci Chen, Yu-Chang Wu, Jen-Hung Huang, H. Kuo, C. Lin
{"title":"Low-temperature direct wafer bonding for III-V compound semiconductors to nanometer-scale grating arrays","authors":"Bai-Ci Chen, Yu-Chang Wu, Jen-Hung Huang, H. Kuo, C. Lin","doi":"10.1109/ISNE.2015.7132038","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7132038","url":null,"abstract":"In this paper, we designed the grating with different periodicities on silicon. Aluminum or silicon dioxide would be filled in the inter-space of grating. Besides, the surface reflectivity of different structures was measured and the theoretical calculation was performed. By oxygen plasma-enhanced process, we successfully present the results of a low-temperature process for direct bonding of InP epitaxial layers on a silicon wafer.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"22 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132722688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bidirectional WDM PON with remote pumped gain flattening EDFA by using cascading FBGs and LPFG 双向WDM PON远程泵浦增益通过级联fbg和LPFG使EDFA平坦化
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7131982
Y. L. Yu, C. Peng, S. Liaw, Z. Lee, C. C. Chen
{"title":"Bidirectional WDM PON with remote pumped gain flattening EDFA by using cascading FBGs and LPFG","authors":"Y. L. Yu, C. Peng, S. Liaw, Z. Lee, C. C. Chen","doi":"10.1109/ISNE.2015.7131982","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7131982","url":null,"abstract":"We proposed a remote pumped bidirectional C+L band fiber amplifier for wavelength division multiplexing (WDM) passive optical network (PON). A high-reflectivity pump reflector using three cascading fiber Bragg gratings (FBGs) is designed to reflect the residual pump power for L band amplification. Both the gains for C band and L band are larger than 10.0 dB under -10 dBm launched power. Using the remote pumped bidirectional fiber amplifier, the power penalty is only 0.82dB after 10Gb/s, 24 km bi-directional transmission.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114309291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Graph realization of reed-muller codes for data hiding 数据隐藏reed-muller代码的图形实现
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7131977
Ting-Ya Yang, Houshou Chen
{"title":"Graph realization of reed-muller codes for data hiding","authors":"Ting-Ya Yang, Houshou Chen","doi":"10.1109/ISNE.2015.7131977","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7131977","url":null,"abstract":"In recent years the information industry develops vigorously and the progress in technology results in thriving augmentation of internet and people pass messages mutually through network in large number and triggers the issue of information security. In order to protect the safety and reliability of message passing, the development of steganography is thereby generated. In this research we will aim at its embedding and the major point of investigation is how to ensure the quality of the host after embedding secret message that means how to lower its distortion. On the other hand we want to increase the embedding efficiency and in this way we can send much more messages. At the same time we also have to consider the problem of complexity as too complicated algorithm is not feasible. This thesis is data hiding of binary host image and the Reed-Muller Codes of linear block codes in the error-correcting codes is applied to conduct research on steganography. Decoding algorithm is presented to conduct simulation analysis and discussion aiming at the embedding rate and embedding efficiency.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114900010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Photocatalytic study of silver and bismuth codoped zinc oxide by spray pyrolysis 喷雾热解法光催化银铋共掺杂氧化锌的研究
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7131981
Tzu-Yang Lin, WeiHsuan Hsu, ChunYi Lee, YuXuan Ding, ShengChung Huang, W. Lan, MuChun Wang
{"title":"Photocatalytic study of silver and bismuth codoped zinc oxide by spray pyrolysis","authors":"Tzu-Yang Lin, WeiHsuan Hsu, ChunYi Lee, YuXuan Ding, ShengChung Huang, W. Lan, MuChun Wang","doi":"10.1109/ISNE.2015.7131981","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7131981","url":null,"abstract":"The bismuth and silver co-doped zinc oxide was prepared by spray pyrolysis at 450°C. With the increasing of silver, different state can be specified from the 10K photoluminescence analysis. The improved photocatalytic activity can be observed for thin film with suitable silver doping through the photodegradation of congo red under UV-light irradiation.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127062436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Physical level IC implementation for speed control of three phase induction motors 三相感应电动机速度控制的物理级集成电路实现
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7131997
Neenu Sivanand, S. V. Srinivasan, R. Bhavani
{"title":"Physical level IC implementation for speed control of three phase induction motors","authors":"Neenu Sivanand, S. V. Srinivasan, R. Bhavani","doi":"10.1109/ISNE.2015.7131997","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7131997","url":null,"abstract":"This paper presents the design and physical layout implementation of constant v/f method for speed control of an AC induction motor using VLSI 90nm technology. This method falls under the category of VVVF drives, that is based on Sinusoidal pulse width modulation technique (SPWM). SPWM plays an important role in the minimization of lower order harmonics and switching power losses in the power converters used in controllers. The entire module is constructed precisely using sub modules such as Interface module, PWM, Oscillator and Amplitude module. These modules are synthesized using design vision tool from Synopsys Inc and XST tool from Xilinx Inc. The HDL code is programmed using VHDL language and area & consumption of power parameters in the sub modules are identified. The physical level IC implementation of the controller is compiled using IC compilation tool from Synopsys Inc.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127878291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
New functional semiconductor devices fabricated using bio nano process 利用生物纳米工艺制备的新型功能半导体器件
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7131946
Y. Uraoka
{"title":"New functional semiconductor devices fabricated using bio nano process","authors":"Y. Uraoka","doi":"10.1109/ISNE.2015.7131946","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7131946","url":null,"abstract":"In this study, we propose a nano-system utilizing bio supra molecules as bio template. Bio supra molecules has many fascinating features such as size uniformity and self-assembling ability, which cannot be observed in conventional inorganic materials. We established the technique to place above-mentioned material accurately from one to three dimensions on the semiconductor substrate. In this work, we introduce several examples of application to electron device, such as floating gate memory, resistive memory, thin film transistor, MEMS sensor, solar cell, meta-materials.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"2594 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128814365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
ESD reliability comparison of different layout topologies in the 0.25-μm 60-V nLDMOS power devices 0.25 ~ μm 60v nLDMOS电源器件不同布局拓扑ESD可靠性比较
2015 International Symposium on Next-Generation Electronics (ISNE) Pub Date : 2015-05-04 DOI: 10.1109/ISNE.2015.7132028
Shen-Li Chen, Chun-Ju Lin, Shawn Chang, Yu-Ting Huang, Shun-Bao Chang
{"title":"ESD reliability comparison of different layout topologies in the 0.25-μm 60-V nLDMOS power devices","authors":"Shen-Li Chen, Chun-Ju Lin, Shawn Chang, Yu-Ting Huang, Shun-Bao Chang","doi":"10.1109/ISNE.2015.7132028","DOIUrl":"https://doi.org/10.1109/ISNE.2015.7132028","url":null,"abstract":"The impact of layout-type dependences on anti-ESD robustness in a 0.25 μm 60 V process will be investigated in this paper, which included the traditional striped-type nLDMOS, waffle-type nLDMOS, and nLDMOS embedded with a pnp-manner SCR devices. Then, these nLDMOS devices are used to evaluate the influence of layout architecture on trigger voltage (Vt1), holding voltage (Vh) and secondary breakdown current (It2). Eventually, it can be found that how to sketch the layout pattern of an nLDMOS is a very important issue in the anti-ESD consideration. The waffle-type nLDMOS DUT is poor contribution to It2 robustness due to the non-uniform turned-on phenomenon and a narrow channel width per unit finger. Therefore, the It2 robustness of a waffle-type nLDMOS device is decreased about 17% as compared with a traditional striped-type (reference) nLDMOS device. The ESD abilities of traditional striped-type and waffle-type nLDMOS devices with an embedded SCR (pnp-manner arrangement in the drain side) are better than a traditional nLDMOS 224.4% in average. Noteworthy, the nLDMOS-SCR (pnp-manner arrangement) is a good structure for the anti-ESD reliability in high-voltage applications.","PeriodicalId":152001,"journal":{"name":"2015 International Symposium on Next-Generation Electronics (ISNE)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123745168","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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