The integration process of W-plug landing on Cu line in 28nm-node flash memory and beyond

Y. Lu, Wei-Lin Wang, Pei-Chia Chen, C. Lai, Hao-Tang Hsu, Chia-Yu Li, Chih-Yuan Chen, L. Young, M. Yeh, Hsien-Chang Kuo, Hung-Ju Chien, T. Ying
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Abstract

The integration process of W-plug landing on Cu line has been investigated systematically step-by-step. The process is divided into four steps, including pre-clean, Ti, TiN, and W depositions. The over-all contact resistance of the structure is successfully reduced by reactive plasma treatment for pre-clean, Ti deposition, adding the cycles of plasma treatment for TiN by metal organic chemical vapor deposition, and increasing the temperature of W deposition.
28nm及以上节点闪存中w插头落在Cu线上的集成过程
系统地、逐步地研究了w塞在铜线上的集成过程。该过程分为四个步骤,包括预清洁,Ti, TiN和W沉积。通过反应等离子体预处理、Ti沉积、增加金属有机化学气相沉积TiN的等离子体处理周期和提高W沉积温度,成功地降低了结构的总接触电阻。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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