2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)最新文献

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Stacked DBC Cavitied Substrate for a 15-kV Half-bridge Power Module 用于15kv半桥电源模块的堆叠DBC空腔基板
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799077
A. Deshpande, F. Luo, A. Iradukunda, D. Huitink, L. Boteler
{"title":"Stacked DBC Cavitied Substrate for a 15-kV Half-bridge Power Module","authors":"A. Deshpande, F. Luo, A. Iradukunda, D. Huitink, L. Boteler","doi":"10.1109/IWIPP.2019.8799077","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799077","url":null,"abstract":"High-voltage (3.3 – 10 kV) SiC power switching devices are on the verge of commercialization, while devices rated 15 kV and above are expected in the future. Consequently, there is an increasing demand for power modules that reliably packages them in common topologies for high-performance, while using standard manufacturing processes. This paper presents a solution to utilize direct-bonded-copper (DBC), which is a conventional low-voltage power module substrate, for highvoltage (15 kV) half-bridge power module packaging. The concept involves stacking multiple DBCs with the top-surface metallization pattern replicated on each inter-layer and the bottom-surface metallization. The consequent formation of the interlayer cavities within the stacked substrate creates a series-connected multi-layer capacitor under the DC+, DC−, and AC top-surface metallization. The multi-layer capacitors, where the DBC ceramic acts as the dielectric, equally distribute the high-voltage on the top-surface metallization across each ceramic under it. The voltage distribution enables minimization of the electric fields at the critical triple-point and within the bulk of ceramic. The proposed stacking allows bypassing the need for a voltage-clamped interlayer metallization. A multi-domain (electrical, thermal, mechanical) parametric analysis was performed to determine the number of ceramic layers and total ceramic thickness in the stack. The performed analysis qualitatively demonstrated the effectiveness of the proposed solution with an underlying trade-off.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124375466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Thermal simulations of SiC MOSFETs under short-circuit conditions: influence of various simulation parameters 短路条件下SiC mosfet的热模拟:各种模拟参数的影响
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799085
Y. Pascal, M. Petit, D. Labrousse, F. Costa
{"title":"Thermal simulations of SiC MOSFETs under short-circuit conditions: influence of various simulation parameters","authors":"Y. Pascal, M. Petit, D. Labrousse, F. Costa","doi":"10.1109/IWIPP.2019.8799085","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799085","url":null,"abstract":"The temperature distribution in a Silicon Carbide (SiC) MOSFET during a destructive short-circuit is simulated using a custom 1D-finite difference model implemented using Matlab. Some of the main assumptions usually put forward in the literature dealing with this kind of simulations are tested in this paper. We show that some of those simplifications (model of the heat source, die top-side boundary conditions, etc.), sometime in-spite of common sense, have a great impact on the simulated temperature.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"141 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133229411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Bus Snubber Optimization for Multi-Chip Power Modules using SPICE Simulations 基于SPICE仿真的多芯片电源模块总线缓冲器优化
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799089
Brian T. DeBoi, A. Lemmon
{"title":"Bus Snubber Optimization for Multi-Chip Power Modules using SPICE Simulations","authors":"Brian T. DeBoi, A. Lemmon","doi":"10.1109/IWIPP.2019.8799089","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799089","url":null,"abstract":"Bus snubbers are a commonly used mechanism for improving the switching performance of circuits using wide bandgap devices. Particularly, their influence on switching losses and transient overshoot is of interest. However, bus snubbers can have multiple effects on these behaviors, resulting in a series of tradeoffs. Understanding the tradeoffs associated with bus snubber design can assist in selecting an optimal value for a given system, but determining this optimal value empirically is challenging and time consuming. As such, this paper leverages a SPICE simulation model of a multi-chip power module and accompanying application circuit to analyze these trends. This simulation model is empirically validated with a set of experiments performed on a double pulse test stand. The resulting analysis demonstrates that the presented SPICE model can facilitate the selection of an optimal bus capacitor, thereby reducing the need for empirical analysis. The effect of additional resistance in the snubber circuit is also analyzed empirically, revealing further tradeoffs to be considered for snubber design.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131330309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Measurement of Space Charge Distribution Accumulated in Super Engineering Plastics at High Temperature Under High Dc Electric Field 高温高压直流电场下超级工程塑料中空间电荷积累分布的测量
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799090
M. Mima, Yu-ichi Narita, Tokihiro Narita, H. Miyake, Y. Tanaka
{"title":"Measurement of Space Charge Distribution Accumulated in Super Engineering Plastics at High Temperature Under High Dc Electric Field","authors":"M. Mima, Yu-ichi Narita, Tokihiro Narita, H. Miyake, Y. Tanaka","doi":"10.1109/IWIPP.2019.8799090","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799090","url":null,"abstract":"While many kinds of polymeric materials have been developed for being used at high temperature in various devices, there is a few cases that they are used as an electric insulating material for dc high electric stress. However, according to the development of power electric devices in recent years, the demand of an insulating material which show a good performance even at high temperature more than 100 °C has been increasing. Under such severe condition, especially in HVDC (high voltage DC) systems, the space charge accumulation property must be a key factor to evaluate the performance of them. Therefore, we tried to measure the space charge distributions in many kinds of polymers at high temperature (~ 150 °C) under high electric stress (~ 120 kV/mm) using the originally developed PEA (pulsed electro-acoustic) system for high temperature measurement. Judging from the results, the obtained data can be available to evaluate the performance of them under such severe condition.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115487896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Comparison of Silicon Carbide Packages with Different Solder Attach Materials under High Temperature, Fast Power Cycling Conditions 高温、快速功率循环条件下不同焊点材料碳化硅封装的比较
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799100
Lauren E. Kegley, Tim Foster, S. Seal, R. Shaw, B. Mcpherson, B. Passmore, M. Schupbach, T. McNutt
{"title":"Comparison of Silicon Carbide Packages with Different Solder Attach Materials under High Temperature, Fast Power Cycling Conditions","authors":"Lauren E. Kegley, Tim Foster, S. Seal, R. Shaw, B. Mcpherson, B. Passmore, M. Schupbach, T. McNutt","doi":"10.1109/IWIPP.2019.8799100","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799100","url":null,"abstract":"Power cycling is an accelerated reliability test used to induce package-related failure mechanisms through exposure to cyclic thermal and electrical stress. As SiC devices continue to grow in adoption for high power density, high efficiency applications, packaging material tradeoffs must be clearly understood to develop highly reliable packaging systems suitable to meet the lifetime requirements of an end-application environment. Verification of the degradation experienced by various thermo-mechanical stackups during active power cycling is paramount to optimizing packages for applications which exceed standard junction temperature ratings of 150°C. A comparison of the predominant failure mechanisms and lifetime experienced by three different test vehicles, designed to replicate both standard Si IGBT solder attaches and higher-temperature solder attaches, under high temperature (Tj,max = 175°C, ∆T = 80°C), fast (ton < 5 s) power cycling conditions is presented.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129785992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
[Copyright notice] (版权)
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/iwipp.2019.8799102
{"title":"[Copyright notice]","authors":"","doi":"10.1109/iwipp.2019.8799102","DOIUrl":"https://doi.org/10.1109/iwipp.2019.8799102","url":null,"abstract":"","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124484891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Robust On-line Junction Temperature Estimation of IGBT Power Modules based on Von during PWM Power Cycling 基于Von的PWM功率循环过程中IGBT功率模块结温鲁棒在线估计
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799086
N. Degrenne, S. Mollov
{"title":"Robust On-line Junction Temperature Estimation of IGBT Power Modules based on Von during PWM Power Cycling","authors":"N. Degrenne, S. Mollov","doi":"10.1109/IWIPP.2019.8799086","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799086","url":null,"abstract":"Estimation of the junction temperature Tj is key for protection, diagnostics and prognostics of power IGBT modules. Requirements are low-cost, low calibration effort, low intrusiveness, high accuracy, and high robustness. The objective of this paper is to present an on-line Tj estimation method using low load-current pulses for IGBTs and diodes based on the on-state voltage Von as a Temperature Sensitive Electrical Parameter (TSEP). It associates for the first time a calibration, a model, a pulse generation, a measurement and a robustness tuning to generate an estimation with highest performances.The implemented auto-calibration procedure relies on a reduced set of 3-dimensional data. The temperature estimation method is validated on a PWM switching converter, whereby the interruption of the nominal process is shorter than 100us. The estimations are compared to the measurements taken with infrared camera, with error smaller than ±3°C. In addition, a simple analytical on-line method is proposed to correct the errors caused by successive wire-bond lift-off, attributable to the natural ageing of the module, and maintain it within less than ±2°C.The on-line, accurate, robust and practical implementation of Von as a TSEP, as demonstrated in this paper, is intended for condition monitoring of power semiconductor modules in power cycling and field applications.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"19 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114098023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Evaluation of Electric Charge Accumulation in Insulation Layer of Power Module using Direct Current Integrated Charge Measurement 直流综合电荷测量法评价电源模块绝缘层电荷积累
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799087
D. Hanazawa, M. Mima, K. Hijikata, H. Miyake, Y. Tanaka, T. Takada
{"title":"Evaluation of Electric Charge Accumulation in Insulation Layer of Power Module using Direct Current Integrated Charge Measurement","authors":"D. Hanazawa, M. Mima, K. Hijikata, H. Miyake, Y. Tanaka, T. Takada","doi":"10.1109/IWIPP.2019.8799087","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799087","url":null,"abstract":"In this paper, we tried to evaluate the charge accumulation in insulating materials used for electronic power devices. Space charge accumulation is said that one of important factors to evaluate the insulating materials under dc high electric fields, especially at high temperature. While, the space charge accumulation in insulating materials has been measured using pulse electro acoustic (PEA) method, the PEA method has been mainly applied to sheet shape samples. Therefore, it is difficult to apply the PEA method to an insulating layers used for an actual electronic devices, which are usually composed of complicated shape. Therefore, we have tried to apply a direct current integrated charge measurement which is newly developed measurement method to evaluate the charge accumulation in the insulating layers. Using the method, we tried to estimate the charge accumulation in the insulating layer of actual power electronic devices under various electric stresses at various temperature. As the result, it was found that the method was preferably available to evaluate the characteristics of charge accumulation in the insulation layers of the power electronic devices.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131706466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Drastic Change in Non-Linear Resistive Materials I(V) Characteristics 非线性电阻材料I(V)特性的急剧变化
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799097
G. Bélijar, L. Hermette, M. Kozako, M. Hikita
{"title":"Drastic Change in Non-Linear Resistive Materials I(V) Characteristics","authors":"G. Bélijar, L. Hermette, M. Kozako, M. Hikita","doi":"10.1109/IWIPP.2019.8799097","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799097","url":null,"abstract":"Non-linear Resistive Materials are thought to be able to solve aging issues due to intense electric field near triple junction in DBC/AMB substrate of power module. In present study, non-linear I(V) behavior of epoxy/ZnO microvaristor is characterized. Large change in the I(V) characteristic is observed during successive measurements, meaning that material degradation occurred. Optical microscopy of the material surface gave an insight of the phenomenon leading those modifications, an hypothesis on the degradation mechanism is proposed.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130937591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The development of 1200 V SiC Hybrid Switched power modules 1200v SiC混合开关电源模块的研制
2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799083
P. Ning, Tianshu Yuan, Han Cao, Lei Li, Yuhui Kang
{"title":"The development of 1200 V SiC Hybrid Switched power modules","authors":"P. Ning, Tianshu Yuan, Han Cao, Lei Li, Yuhui Kang","doi":"10.1109/IWIPP.2019.8799083","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799083","url":null,"abstract":"In this paper, three hybrid switch (HyS) module consisting of the paralleled Silicon (Si) Insulated Gate Bipolar Transistor (IGBT) and Silicon Carbide (SiC) Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET) are developed. From the double pulse evaluation results, they are promising for fast switching and low price. The fabricated 1200 V/200 A hybrid module was used for a motor drive, and it was tested to 30 kW, 30 kHz.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"156 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129849001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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