2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)最新文献

High reliable silver sintered joint on copper lead frame by pressure sintering process 铜引线框架采用压力烧结工艺，高可靠的银烧结接头

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-24 DOI: 10.1109/IWIPP.2019.8799094

Ly May Chew, W. Schmitt

{"title":"High reliable silver sintered joint on copper lead frame by pressure sintering process","authors":"Ly May Chew, W. Schmitt","doi":"10.1109/IWIPP.2019.8799094","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799094","url":null,"abstract":"Lead-free technique for die attach application has attracted raising attention in recent years. Low temperature silver sinter has demonstrated significant develop over the past years to be considered one of frontrunner lead-free die attach solution. Pressure silver sintering offers superior thermal and electrical conductivity as well as mechanical properties compared to non-pressure silver sintering. The total process time of pressure sintering is almost 8 times shorter than that of non-pressure sintering. In this study, we compared silver sintered joint created on Ag plated and bare Cu TO 220 lead frame obtained by non-pressure sintering. Additionally, a comparison of non-pressure sintering and pressure sintering on bare Cu TO 220 lead frame was also carried out. For non-pressure sintering, the average die shear strength for Ag plated lead frame is almost three times higher than for bare Cu lead frame. This observation can be ascribed to the self-diffusion of Ag is higher than for interdiffusion between Ag and Cu. By applying pressure during sintering process, the bonding strength of sintered joint on bare Cu lead frame can be increased significantly. We further observed that the die shear strength tested at 260 °C is higher than those tested at RT. Furthermore, the die shear strength increased after temperature cycling test with a condition of −55 °C/+150 °C. It is very likely that the sintering process continue to occur at high temperature resulting in higher bonding strength. The present study clearly demonstrated that high reliable silver sintered joint can be created on bare Cu lead frame by pressure sintering.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123155189","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Ceramic substrates for high voltage power electronics: past, present and future 高压电力电子用陶瓷基板:过去、现在和未来

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-24 DOI: 10.1109/IWIPP.2019.8799084

Z. Valdez-Nava, D. Kenfaui, M. Locatelli, L. Laudebat, S. Guillemet

引用次数: 11

Electric Field Control by Nonlinear Field Dependent Conductivity Dielectrics Characterization for High Voltage Power Module Packaging 基于非线性场相关电导率介质特性的高压电源模块封装电场控制

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-24 DOI: 10.1109/IWIPP.2019.8799101

M. Tousi, M. Ghassemi

引用次数: 19

Study of the Impedance of the Bypassing Network of a Switching Cell – Influence of the Positioning of the Decoupling Capacitors 开关电池旁路网络阻抗的研究——去耦电容位置的影响

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-24 DOI: 10.1109/IWIPP.2019.8799093

Y. Pascal, D. Labrousse, M. Petit, F. Costa

引用次数: 3

PEEC Method and Hierarchical Approach Towards 3D Multichip Power Module (MCPM) Layout Optimization 三维多芯片电源模块(MCPM)布局优化的PEEC方法和分层方法

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-24 DOI: 10.1109/IWIPP.2019.8799081

Quang Le, Tristan M. Evans, Yarui Peng, H. Mantooth

{"title":"PEEC Method and Hierarchical Approach Towards 3D Multichip Power Module (MCPM) Layout Optimization","authors":"Quang Le, Tristan M. Evans, Yarui Peng, H. Mantooth","doi":"10.1109/IWIPP.2019.8799081","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799081","url":null,"abstract":"Recent advances in packaging technologies have improved multichip power module (MCPM) power density through innovative designs with layout size reduction, multi-layer stacking, and heterogeneous components integration. As these layout designs are getting denser, signal integrity issues due to mutual couplings demand more consideration. Hence, in order to handle these new layouts in the power module design automation tool—PowerSynth, a new electrical model has been developed based on the PEEC method. This method provides further insights into electrical reliability during optimization by evaluating current density and electric field inside each conductor. A coarse meshing process is applied to every generated layout to ensure accurate parasitic extraction while maintaining efficient computation time. Furthermore, a hierarchical approach has been applied to form connections between traces and components during placement to evaluate electrical parasitics without increasing the number of mesh points. Comparisons versus FEA simulation tools and experiments have shown promising initial extraction results using this model.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124195452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Effect of film thickness and electrode material on space charge formation and conductivity in polyimide films 薄膜厚度和电极材料对聚酰亚胺薄膜空间电荷形成和电导率的影响

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799098

F. Carrasco, L. Berquez, K. Tajiri, H. Muto, D. Marty-Dessus, M. Locatelli, S. Diaham, V. Griseri, T. Lebey, G. Teyssèdre

{"title":"Effect of film thickness and electrode material on space charge formation and conductivity in polyimide films","authors":"F. Carrasco, L. Berquez, K. Tajiri, H. Muto, D. Marty-Dessus, M. Locatelli, S. Diaham, V. Griseri, T. Lebey, G. Teyssèdre","doi":"10.1109/IWIPP.2019.8799098","DOIUrl":"https://doi.org/10.1109/IWIPP.2019.8799098","url":null,"abstract":"Polyimides (PI) are well-known materials used as passivation and insulating layers in microelectronics or power electronics. Though the electric field and temperature withstanding of polyimides have been investigated for long, little information is available on the space charge behavior in relatively thin polyimide films. In this work, the space charge behavior was investigated with the Laser Intensity Modulation Method (LIMM) which is suited for films of several µm in thickness. It is complemented by DC conductivity measurements. The analysis is made on 12 and 18 µm thick PI-layers deposited on Si-substrates with using Al or Au top electrodes. A build-up of negative charges can be observed, irrespective of the polarity of the applied voltage, as the external field is increasing in the range 25–125 kV/mm. With decreasing film thickness, the DC conductivity increases and a diminution of the internal electric field distortion occurs. The native alumina formed between the aluminium electrode and the PI could act as a barrier to electrons injection from the top electrode.","PeriodicalId":150849,"journal":{"name":"2019 IEEE International Workshop on Integrated Power Packaging (IWIPP)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125428005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

New approach for faster thermal modeling of PCBs based on power module applications 基于功率模块应用的pcb更快热建模新方法

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799078

Michael Hofer

引用次数: 1

IWIPP 2019 Welcome

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/iwipp.2019.8799073

引用次数: 0

IWIPP 2019 Industry Partners IWIPP 2019行业合作伙伴

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/iwipp.2019.8799072

D. Fabiani

引用次数: 0

A PCB based package and 3D assembly for high power density converters 用于高功率密度转换器的基于PCB的封装和3D组件

2019 IEEE International Workshop on Integrated Power Packaging (IWIPP) Pub Date : 2019-04-01 DOI: 10.1109/IWIPP.2019.8799099

R. Mrad, Julien Morand, R. Perrin, S. Mollov

引用次数: 1