D. Osintsev, V. Sverdlov, Z. Stanojević, A. Makarov, S. Selberherr
{"title":"Transport properties of spin field-effect transistors built on Si and InAs","authors":"D. Osintsev, V. Sverdlov, Z. Stanojević, A. Makarov, S. Selberherr","doi":"10.1109/ULIS.2011.5757998","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5757998","url":null,"abstract":"We investigate the properties of ballistic spin field-effect transistors (SpinFETs). First we show that the amplitude of the tunneling magnetoresistance oscillations decreases dramatically with increasing temperature in SpinFETs with the semiconductor channel made of InAs. We also demonstrate that the [100] orientation of the silicon fin is preferred for practical realizations of silicon SpinFETs due to stronger modulation of the conductance as a function of spin-orbit interaction and magnetic field.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"18 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131091400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Lucovsky, L. Miotti, D. Zeller, C. Adamo, D. Scholm
{"title":"X-ray absorption studies of elemental and complex transition metal (TM) oxides: Differences between: (i) Chemical, and (ii) Local site symmetry multivalency","authors":"G. Lucovsky, L. Miotti, D. Zeller, C. Adamo, D. Scholm","doi":"10.1109/ULIS.2011.5758000","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5758000","url":null,"abstract":"Alloy induced multivalency in transition metal oxides increases device functionality. Effects include insulator to metal transitions in the d<sup>0</sup> perovskites (i) GdScO<inf>3</inf>, by substitution of tetravalent Ti trivalent for Sc, and (ii) LaMnO<inf>3</inf> by alloy substitution of trivalent La and divalent Sr for trivalent La. Substituion of Ti<sup>3+</sup> for Sc<sup>3+</sup> on the ScO<inf>2</inf> planes leads to hopping induced multivalencey for both Ti and Sc, but only for Ti compositions above a percolation threshold. The formation of La<inf>1−x</inf>Sr<inf>x</inf>MnO<inf>3</inf> alloys leads to mixed valence of the Mn-atoms: Mn<sup>3+</sup> in the LaMnO<inf>3</inf> fraction, and Mn<sup>4+</sup> in the SrMnO<inf>3</inf> fraction. Spectroscopic detection is based on charge transfer multiplet theory applied to Ti, Sc and Mn L<inf>2,3</inf> spectra were multivalent charge states increase the number of spectral features. Multivalency also occurs suboxide alloys such as TiO<inf>2−x</inf> in a composition range: TiO<inf>2</inf> > TiO<inf>2−x</inf> > TiO<inf>1.5</inf>. These alloys have a mix of Ti<sup>4+</sup> and Ti<sup>3+</sup> local bonding states, but due to hopping transport, the mix includes Ti<sup>2+</sup>. One important aspect of controlled multivalency is that it provides a way of changing and/or controlling the density of O-vacancy defects. Electrons can be injected into the oxide negative ion states ion states from Si, Ge, and other semiconductors, as well as metals with different offset energies [1]. The two terminal devices with asymmetric current-voltage charateristics providing options for memory devices.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128890577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Toy model for the progressive breakdown dynamics of ultrathin gate dielectrics","authors":"E. Miranda, D. Jiménez, J. Suñé","doi":"10.1109/ULIS.2011.5758016","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5758016","url":null,"abstract":"A simple analytic model for the progressive breakdown (BD) dynamics of ultrathin) gate oxides is presented. It is shown how the interplay between series and parallel resistances that represent the breakdown path and its surroundings leads to a sigmoidal I-t characteristic compatible with experimental data. The analysis is carried out using the Lyapunov exponent and the potential function associated with the logistic equation for the leakage current. The roles played by the initial current value and the system's attractor in the breakdown trajectories are discussed.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116967787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-temperature perspectives of UTB SOI MOSFETs","authors":"V. Kilchytska, F. Andrieu, O. Faynot, D. Flandre","doi":"10.1109/ULIS.2011.5758013","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5758013","url":null,"abstract":"In this paper, we analyze, for the first time to our best knowledge, the high-temperature perspectives of Ultra-thin body (UTB) SOI MOSFETs. High-temperature behavior of threshold voltage, subthreshold slope, transconductance maximum and on-current is analyzed in details through measurements and 2D simulations. Particular attention is paid to the effect of buried oxide (BOX) and Si film thicknesses as well as channel doping on the degradation of main device parameters over the temperature range.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132007470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The effect of the doping concentration on nanoscale field effect diode performance","authors":"N. Manavizadeh, F. Raissi, E. Soleimani","doi":"10.1109/ULIS.2011.5757992","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5757992","url":null,"abstract":"The performance of nanoscale Field Effect Diode as a function of doping concentration is investigated. Our numerical results show that the I<inf>on</inf>/I<inf>off</inf> ratio which is a significant parameter in digital application can be varied from 10<sup>1</sup> to 10<sup>4</sup> as the doping concentration of source/drain regions increased from 10<sup>16</sup> to 10<sup>21</sup> cm<sup>−3</sup>. The figures of merit including intrinsic gate delay time and energy-delay product have been studied for the field effect diodes which are interesting candidates for future logic application.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"289 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123042824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Razavi, G. Fagas, I. Ferain, N. Akhavan, R. Yu, J. Colinge
{"title":"Performance investigation of short-channel junctionless multigate transistors","authors":"P. Razavi, G. Fagas, I. Ferain, N. Akhavan, R. Yu, J. Colinge","doi":"10.1109/ULIS.2011.5758005","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5758005","url":null,"abstract":"We investigate the performance of short channel junctionless gate-all-around (GAA) transistors, by comparing the I_V characteristics, subthreshold swing and drain-induced barrier lowring (DIBL) of junctionless GAA transistors with accumulation-mode GAA transistors. We also compare the I_V characteristics of junctionless GAA transistors for different wafer and transport orientations. MuGFETs are investigated for different wafer and channel orientation.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129510558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Source/drain engineered ultra low power analog/RF UTBB MOSFETs","authors":"A. Kranti, J. Raskin, G. A. Armstrong","doi":"10.1109/ULIS.2011.5757997","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5757997","url":null,"abstract":"We present a novel optimization technique for ultra-low-power analog/RF Ultra Thin Body BOX (UTBB) MOSFETs. UTBB devices are optimized in bias range corresponding to peak of transconductance-to-current ratio (g<inf>m</inf>/I<inf>ds</inf>) and cut-off frequency (f<inf>T</inf>) product i.e. g<inf>m</inf>f<inf>T</inf>/I<inf>ds</inf> as it represents a “sweet spot” between speed and power. It is demonstrated that the use of underlap source/drain (S/D) architecture in UTBB devices improve g<inf>m</inf>f<inf>T</inf>/I<inf>ds</inf>, intrinsic voltage gain (A<inf>VO</inf>), cut-off frequency (f<inf>T</inf>) and linearity (VIP<inf>3</inf>) with downscaling.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130208163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Clavel, T. Poiroux, M. Mouis, L. Becerra, J. Thomassin, A. Zenasni, G. Lapertot, D. Rouchon, D. Lafond, O. Faynot
{"title":"Influence of annealing temperature on the performance of graphene / SiC transistors with high-k / metal gate","authors":"M. Clavel, T. Poiroux, M. Mouis, L. Becerra, J. Thomassin, A. Zenasni, G. Lapertot, D. Rouchon, D. Lafond, O. Faynot","doi":"10.1109/ULIS.2011.5757955","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5757955","url":null,"abstract":"In this study, we investigate the impact of thermal annealing on the electrical characteristics of epitaxial graphene field effect transistors. Top gated devices were fabricated from graphene obtained on silicon carbide (SiC) substrate. Thanks to an annealing at 300°C, the performance of the devices was enhanced by a factor of 90. The maximal transconductance reached really high values such as 5900µS/µm at VD=3V, corresponding to a carrier mobility of 2230 cm2/V.s.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127766000","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. De Rose, M. Zanuccoli, P. Magnone, E. Sangiorgi, C. Fiegna
{"title":"Open issues for the numerical simulation of silicon solar cells","authors":"R. De Rose, M. Zanuccoli, P. Magnone, E. Sangiorgi, C. Fiegna","doi":"10.1109/ULIS.2011.5757961","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5757961","url":null,"abstract":"The improvement of solar cell efficiency requires device optimization, including the careful design of contacts and doping profiles, and the implementation of light trapping strategies. In this context, electro-optical numerical simulation is essential to analyze the physical mechanisms that limit the cell efficiency and lead to design trade-offs. In this work we discuss the calibration of the relevant physical models for electrical simulation and we put in evidence important limitations of the most common adopted optical simulators.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128451170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. E. Husseini, F. Martinez, M. Bawedin, M. Valenza, R. Ritzenthaler, F. Lime, B. Iñíguez
{"title":"A surface potential based compact model for lightly doped FD SOI MOSFETs with ultra-thin body","authors":"J. E. Husseini, F. Martinez, M. Bawedin, M. Valenza, R. Ritzenthaler, F. Lime, B. Iñíguez","doi":"10.1109/ULIS.2011.5757972","DOIUrl":"https://doi.org/10.1109/ULIS.2011.5757972","url":null,"abstract":"In this paper, a new surface potential based compact model for long channel fully depleted SOI MOSFET with lightly doped ultra-thin body is presented. The 1-D Poisson equation is solved using the appropriate boundary conditions, and a closed-form surface potential solution is proposed for the front and back surface potentials. Finally the model was compared to numerical simulations and a good agreement is observed.","PeriodicalId":146779,"journal":{"name":"Ulis 2011 Ultimate Integration on Silicon","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132743413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}