2008 2nd Electronics System-Integration Technology Conference最新文献_第8页

Modelling methodology for thermo-electric coolers in CFD CFD中热电冷却器的建模方法

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684518

M. Pearse

引用次数: 6

Microsystems technology for the separation of fetal cells from maternal blood 从母体血液中分离胎儿细胞的微系统技术

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684451

D. Kavanagh, David Flynn, Farid Amalou, Brian G. Moffat, Resham Dhariwal, Marc P. Y. Desmulliez

引用次数: 0

Industrial and technical aspects of chip embedding technology 工业和技术方面的芯片嵌入技术

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684368

A. Ostmann, D. Manessis, J. Stahr, M. Beesley, M. Cauwe, J. De Baets

{"title":"Industrial and technical aspects of chip embedding technology","authors":"A. Ostmann, D. Manessis, J. Stahr, M. Beesley, M. Cauwe, J. De Baets","doi":"10.1109/ESTC.2008.4684368","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684368","url":null,"abstract":"Embedding of semiconductor chips into organic substrates allows a very high degree of miniaturization by stacking multiple layers of embedded components, superior electrical performance by short and geometrically well controlled interconnects as well as a homogeneous mechanical environment of the chips, resulting in good reliability. At PCB manufacturing level, 50 mum thin chips have been embedded with pitches up to 200 mum in up to 18ldquotimes24rdquo panels. Embedding of chips at 100 mum pitch has been achieved at prototype level. Further developments of chip embedding can extend to even finer pitches without redistribution methods only with concurrent developments in ultra fine line patterning, plating methods and chemistries, assembly machines. New manufacturing processes should combine PCB processing and die assembly in one production line in order to benefit the most from this combination without the difficulties of transport between different manufacturing plants. Furthermore, new testing methodologies will be developed and a new supply chain will be created due to incorporation of embedding technologies to PCB production. This paper discusses in detail the technology and manufacturing challenges arisen from the integration of embedding technologies to PCB manufacturing processes.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116931512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 30

Data visualization in a fast data acquisition system for long-term reliability tests of microelectronic interconnections 用于微电子互连长期可靠性试验的快速数据采集系统中的数据可视化

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684395

R. Zawierta, P. Matkowski, K. Urbanski, J. Felba

{"title":"Data visualization in a fast data acquisition system for long-term reliability tests of microelectronic interconnections","authors":"R. Zawierta, P. Matkowski, K. Urbanski, J. Felba","doi":"10.1109/ESTC.2008.4684395","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684395","url":null,"abstract":"In modern electronics one of the most important target is to make reliability tests shorter and more effective. To solve that problem, the novel fast data acquisition system was developed. It uses fast FPGA modules, a microcontroller for fast-response feedback and FPGA control as well as transmission of the data to PC over Ethernet protocol. Single test lasts for many days and produces large amount of data. It is necessary to acquire, store and visualize data in efficient way. There is no commercial product, which can handle multiple channel data acquisition and visualization over Ethernet protocol in real-time and provide very short response times. To improve quality of detection algorithms, there is a possibility to set-up custom triggers directly from visualization module. Software is written using only standard Win32 API, and is fully and compatible with all Windowsreg based PC (it is independent from specific OS version). Using this solution together with our propriety classes, it was possible to achieve very high efficiency and flexibility.The main advantage of using an Ethernet protocol in control system is a possibility of flexible, fast and reliable data transfer between multiple devices (measuring unit, control unit, storage unit) on existing network infrastructure (IEEE 802.1).","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128145671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

3D-Mintegration: The design and manufacture of 3D miniaturised integrated products 3D集成:设计和制造3D小型化集成产品

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684442

M. Desmulliez, D. Topham

引用次数: 5

Effective thermal modelling evaluation and non-destructive tests for thermal via-structures in organic multi layer PCBs 有机多层pcb热通孔结构的有效热建模评价与无损检测

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684489

R. Schacht, B. Wunderle, D. May, M. Abo Ras, W. Faust, B. Michel, H. Reichl

引用次数: 7

Fracture mechanics analysis of cracks in solder joint Intermetallic Compounds 金属间化合物焊点裂纹的断裂力学分析

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684445

M. O. Alam, H. Lu, C. Bailey, Y. Chan

{"title":"Fracture mechanics analysis of cracks in solder joint Intermetallic Compounds","authors":"M. O. Alam, H. Lu, C. Bailey, Y. Chan","doi":"10.1109/ESTC.2008.4684445","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684445","url":null,"abstract":"The trend towards miniaturization of electronic products leads to the need for very small sized solder joints. Therefore, there is a higher reliability risk that too large a fraction of solder joints will transform into Intermetallic Compounds (IMCs) at the solder interface. In this paper, fracture mechanics study of the IMC layer for SnPb and Pb-free solder joints was carried out using finite element numerical computer modelling method. It is assumed that only one crack is present in the IMC layer. Linear Elastic Fracture Mechanics (LEFM) approach is used for parametric study of the Stress Intensity Factors (SIF, KI and KII), at the predefined crack in the IMC layer of solder butt joint tensile sample. Contrary to intuition, it is revealed that a thicker IMC layer in fact increases the reliability of solder joint for a cracked IMC. Value of KI and KII are found to decrease with the location of the crack further away from the solder interfaces while other parameters are constant. Solder thickness and strain rate were also found to have a significant influence on the SIF values. It has been found that soft solder matrix generates non-uniform plastic deformation across the solder-IMC interface near the crack tip that is responsible to obtain higher KI and KII.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"603 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134379382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Effect of encapsulation on OLED characteristics with anisotropic conductive adhesive 各向异性导电胶封装对OLED特性的影响

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684421

Yan Zhang, M. Andréasson, J. Liu, T. Andersson, Hsuan-Yi Liao, I. Watanabe

引用次数: 0

Megasonic enhanced wafer bumping process to enable high density electronics interconnection 微电子增强晶圆碰撞工艺，实现高密度电子互连

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684440

Yingtao Tian, J. Kaufrnann, Changqing Liu, D. Hutt, Bob Stevens, Marc P. Y. Desmulliez

{"title":"Megasonic enhanced wafer bumping process to enable high density electronics interconnection","authors":"Yingtao Tian, J. Kaufrnann, Changqing Liu, D. Hutt, Bob Stevens, Marc P. Y. Desmulliez","doi":"10.1109/ESTC.2008.4684440","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684440","url":null,"abstract":"The assembly of hybrid pixel detectors requires direct interconnection between the readout chip and sensor chip. In such systems, the connection pitch size may be below 50 mum, such that the packing density (i.e. I/Os) may exceed 40,000/cm2. Electroplating is a promising approach to enable low-cost, high yield and ultra-fine pitch bumping. This paper reports an ultra-fine pitch electroplating bumping process which can be enhanced by incorporating megasonic agitation. Acoustic agitation at above 1 MHz frequencies is able to significantly reduce the diffusion boundary layer of electroplating to a thickness less than 1 mum, as compared to tens of microns under conventional plating conditions. The initial experimental results presented here demonstrate an enhanced polycrystalline growth other than dendrite deposition under a very high current density through megasonic agitation deposition, thereby allowing a significant acceleration of the electrodeposition process. For the electroplating wafer bumping process, megasonic agitation can also accelerate the bump growth rate under the same current density, due to the increase of cathodic current efficiency. Also, megasonic agitation appears not to damage the photoresist pattern, which is often the case when ultrasonic agitation is used.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"49 8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133071890","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Embedded duplexer implementation for WiMAX front-end module with organic package substrate 基于有机封装基板的WiMAX前端模块嵌入式双工器实现

2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684398

Kyungo Kim, Taeeui Kim, Hongwon Kim, Sung Yi

{"title":"Embedded duplexer implementation for WiMAX front-end module with organic package substrate","authors":"Kyungo Kim, Taeeui Kim, Hongwon Kim, Sung Yi","doi":"10.1109/ESTC.2008.4684398","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684398","url":null,"abstract":"In this paper, low cost and highly compact duplexers are investigated for dual-band WiMAX FEM (front-end module) with multi-layered organic package substrate. This dual band FEM includes a duplexer and 2,5 GHz power amplifier die. To achieve small module for mobile applications, FEM should have a tiny PKG form factor. In addition to module size limitation, FEM requires higher gain and stringent attenuation specification for reducing RF interference from a frequency overlap. To implement low cost and highly compact FEM, an effective solution is to embed passive components inside PCB. The embedded duplexer was designed on 8 layer organic substrates for finding out efficient structure and verifying FEM specifications. This components design implemented by using ADS and HFSS. The dual-band FEM with embedded passive components incorporates duplexer including 2GHz, 5GHz BPFs. Integrated dual-band BPFs show an insertion loss of <-2.0dB in path band and 20dB attenuation performance in rejection band. Since conventional PCB process has higher tolerance than semiconductor process, it is important to control process tolerance. The measured results of BPFs and duplexer show good electrical performance with low insertion loss, high attenuation. Embedded passive Packaging technology has many advantages such as improving packaging efficiency and better electrical performances for low cost and highly compact RF SOP (System on Package) applications.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131761625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3