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2008 2nd Electronics System-Integration Technology Conference最新文献

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Design rules to optimize the layout of multilayer circuit packages at 100GHz 优化100GHz多层电路封装布局的设计规则
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684545
A. Abeygunasekera, C. Free
{"title":"Design rules to optimize the layout of multilayer circuit packages at 100GHz","authors":"A. Abeygunasekera, C. Free","doi":"10.1109/ESTC.2008.4684545","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684545","url":null,"abstract":"New data are presented on the effects of coupling between conductors in a highly integrated, multilayer circuit working at high millimeter wave frequencies. Design rules have been developed to summarize the results and provide guidance to the circuit designer on the minimum spacing between conductors in a multilayer package.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124636664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Thermal and electrical modelling of polymer cored BGA interconnects 聚合物芯BGA互连的热学和电学建模
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684490
D. Whalley, H. Kristiansen, F. Marin
{"title":"Thermal and electrical modelling of polymer cored BGA interconnects","authors":"D. Whalley, H. Kristiansen, F. Marin","doi":"10.1109/ESTC.2008.4684490","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684490","url":null,"abstract":"Polymer cored BGA/CSP balls have been proposed as a more reliable alternative to solid solder balls for demanding application environments. Their potential advantages are dependant on their increased compliance compared with a solid solder ball, thereby reducing the level of stress imposed on the solder joints during exposure to cyclic thermal loads and impacts. The latter is of particular importance for hand held products assembled using lead free solders, which are much more brittle than traditional tin-lead alloys, but this may also be important for harsh environment applications where tin-lead solders are still being used, such as in aerospace and defence electronics applications. The increased compliance of a polymer cored ball may reduce the requirement for underfilling of components in hand held products, and allow adoption of BGA/CSP for safety critical applications in harsh environments. Such polymer cored interconnects are however likely to provide a reduced thermal and electrical conductivity and it is important to ensure any such effects do not impact upon the thermal and electrical performance of the product.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124704456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Development of cell gap spacer in LCD for ink-jet printing 液晶屏喷墨打印用电池间隙垫片的研制
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684486
N. Maruyama, Y. Kumashiro, K. Yamamoto
{"title":"Development of cell gap spacer in LCD for ink-jet printing","authors":"N. Maruyama, Y. Kumashiro, K. Yamamoto","doi":"10.1109/ESTC.2008.4684486","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684486","url":null,"abstract":"We have developed the novel ink material for the ink-jet fabrication of the cell gap spacer in LCD. We applied the thermosetting resin to the ink for the gap spacer with the concept of forming the bead-less spacer. The thermosetting resin was solved in the organic solvent to enable jetting. And it formed the centroclinal-shape as the gap spacer through the printing and drying processes. We evaluated the influence of the cure rate of the resin and the surface tension of the ink on the shape of the gap spacer. It became clear that the faster cure rate of the resin made the shape of the gap spacer flat. And the surface tension of the ink and the surface free energy of the substrate had the effect on the shape of the spacer. In consequence, the average height of the gap spacer was to be controllable and the standard deviation of the height was less than 0.03 mum.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126993350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Improved infrared temperature sensing system for mobile devices 改进的移动设备红外温度传感系统
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684455
K. Keranen, Jukka-Tapani Makinen, P. Korhonen, E. Juntunen, V. Heikkinen, J. Makela
{"title":"Improved infrared temperature sensing system for mobile devices","authors":"K. Keranen, Jukka-Tapani Makinen, P. Korhonen, E. Juntunen, V. Heikkinen, J. Makela","doi":"10.1109/ESTC.2008.4684455","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684455","url":null,"abstract":"An infrared (IR) temperature measurement system consists of not only a sensor module and electronics, but also an optomechanical system that guides IR radiation onto the sensor. The geometry and emissivity of the parts affects the reading, if the detector sees not only the target but parts of the measuring system itself. In normal industrial applications, the optics is designed so that the surfaces stabilize to the same temperature as the sensor. This allows the error caused by the device temperature to be easily calibrated away. The correction is valid for stationary conditions and usually near the calibration temperature, which is typically at room temperature. However, we show that if the sensor is embedded into a mobile (hand-held) device which has heat sources, such as power electronics, the normal conditions are no longer valid and the calibration fails. In order to improve infrared temperature sensing for mobile devices, the optics concept was studied and detailed design was performed. In addition, the optics performance was modelled and verified by measurement sensor prototyping. A calibration procedure noticing operational temperature variations was applied. The repeatability of the implemented IR temperature sensor using on a correct transferred calibration curve was better than plusmn0.5degC in an operational temperature range from +12.6 to +49.3degC and target range from +10 to +90degC.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129101609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fine pitch Cu wire bond process for integrated circuit devices for high volume production 用于大批量生产的集成电路器件的细间距铜线键合工艺
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684447
S. Schindler, M. Wohnig, K. Wolter
{"title":"Fine pitch Cu wire bond process for integrated circuit devices for high volume production","authors":"S. Schindler, M. Wohnig, K. Wolter","doi":"10.1109/ESTC.2008.4684447","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684447","url":null,"abstract":"Wire bonding is the most applied technology to realize an electric chip-to-package interconnection and to provide electrical paths from and to the substrate for power and signal distribution. Established in the 1970s, wire bonding has been well documented and researched as a result of continuous process improvement and through the development of sophisticated, automated equipment over the years, [1-2].","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"41 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114020199","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Die-level integration of metal MEMS with CMOS 金属MEMS与CMOS的模级集成
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684344
A. Mukherjee, M. Kiziroglou, A. Holmes, E. Yeatman
{"title":"Die-level integration of metal MEMS with CMOS","authors":"A. Mukherjee, M. Kiziroglou, A. Holmes, E. Yeatman","doi":"10.1109/ESTC.2008.4684344","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684344","url":null,"abstract":"The integration of CMOS electronics with MEMS (micro-electro-mechanical systems) is attractive because it allows MEMS components to be co-located with their associated control and signal processing circuits. However, monolithic integration of electronics with micromechanics generally involves a high initial investment, and can be difficult because of process and material incompatibilities. One approach which avoids some of these issues, and is applicable to low-temperature metal MEMS processes, is to post-process IC (integrated circuit) dies that have been implanted in a carrier wafer. We have developed a process of this type in which CMOS dies are embedded in a 100 mm-dia BSOI (bonded silicon on insulator) carrier. Deep reactive ion etching (DRIE) is used to form die cavities in the device layer, stopping at the buried oxide. The cavity depth is finely adjusted by thinning the device layer so that top surface of each die will lie within plusmn2 mum of the carrier surface. Once the dies have been placed, a layer of photoresist is spin-coated over the carrier. This serves the dual role of fixing the dies in place and planarizing the top surface. Windows are opened in this layer to allow electrical and mechanical contact to the underlying dies. Fabrication of metal MEMS by pattern electroplating can then be performed as on a normal wafer. We have used this approach to fabricate high-Q, self-assembled inductors over 0.18 mum CMOS circuits supplied by a commercial foundry.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"26 13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125677951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Integrated biomedical device for blood preparation 用于血液制备的一体化生物医学装置
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684389
M. Kersaudy-Kerhoas, D. Kavanagh, Xiangdong Xue, M. Patel, C. Bailey, R. Dhariwal, M. Desmulliez
{"title":"Integrated biomedical device for blood preparation","authors":"M. Kersaudy-Kerhoas, D. Kavanagh, Xiangdong Xue, M. Patel, C. Bailey, R. Dhariwal, M. Desmulliez","doi":"10.1109/ESTC.2008.4684389","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684389","url":null,"abstract":"The separation of red blood cells from plasma flowing in microchannels is possible by bio-physical effects such as an axial migration effect and Zweifach-Fung bifurcation law. In the present study, subchannels are placed alongside a main channel to collect cells and plasma separately. The addition of a constriction in the main microchannel creates a local high shear force region, forcing the cells to migrate and concentrate towards the centre of the channel. The resulting lab-on-a-chip was manufactured using biocompatible materials. Purity efficiency was measured for mussel and human blood suspensions as different parameters including flow rate and geometries of parent and daughter channels were varied.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"160 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130046281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A compact V-band planar wideband bandpass filter based on Liquid Crystal Polymer substrates 一种基于液晶聚合物基板的v波段平面宽带带通滤波器
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684343
Xia Zhang, D. Kuylenstierna, J. Liu, Peng Cai, C. Andersson, J. Morris, H. Zirath
{"title":"A compact V-band planar wideband bandpass filter based on Liquid Crystal Polymer substrates","authors":"Xia Zhang, D. Kuylenstierna, J. Liu, Peng Cai, C. Andersson, J. Morris, H. Zirath","doi":"10.1109/ESTC.2008.4684343","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684343","url":null,"abstract":"The move to higher frequencies has stimulated the development of the materials and integration techniques of the RF/microwave/millimeter (mm)-wave areas. Until now, materials commonly used at high frequency are either expensive or have inadequate performance. Liquid crystal polymers (LCPs), have attracted much more attention as advanced candidates as RF/microwave/mm-wave substrate materials for commercial wireless applications due to their combination of features and performance. In this paper, a compact V-band planar microstrip bandpass filter with sharp-rejection, low insertion-loss and wide-bandwidth based on the dual-mode ring resonator is proposed. The filter is fabricated on a LCP substrate by using standard processing technology. The proposed filter exhibits a return loss level better than 10 dB, an insertion loss of 5 dB, and a 3-dB bandwidth of 30%. The simulated and measured results are compared and agree well, which shows the promising potential of LCP laminates for flexible RF/microwave/mm-wave substrates.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130200006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A multilayer process for fine-pitch assemblies on molded interconnect devices (MIDs) 模压互连器件(mid)上细间距组件的多层工艺
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684430
T. Leneke, S. Hirsch, B. Schmidt
{"title":"A multilayer process for fine-pitch assemblies on molded interconnect devices (MIDs)","authors":"T. Leneke, S. Hirsch, B. Schmidt","doi":"10.1109/ESTC.2008.4684430","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684430","url":null,"abstract":"The miniaturization of overall systems plays a key role for the propagation of technological applications. To meet future requirements in size decreasing environments especially the packaging and mounting of silicon devices needs new impulses. 3D-MIDs (3-dimensional molded interconnect devices) exhibit a high potential for smart packages and assemblies. The integration of various functionalities (electrical connections, housing, thermal management, mechanical support) in one 3-dimensional shaped circuit carrier makes a further system shrinking possible. The compatibility between 3D-MIDs and high density fine-pitch semiconductor packages (like BGAs, MCMs, CSPs or even bare dies) is limited. Due to lack of a 3-dimensional multilayer technology the wiring of semiconductors with a high I/O count is critical. Therefore a new 3D-MID multilayer process is developed and combined with an established 3D-MID metallization process. The new multilayer process is investigated with respect to its electrical and mechanical behavior. A demonstrator was fabricated to perform desired tests.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133354262","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Chosen electrical and stability properties of laser-shaped thick-film and LTCC inductors 激光形厚膜和LTCC电感的电学特性和稳定性
2008 2nd Electronics System-Integration Technology Conference Pub Date : 2008-11-21 DOI: 10.1109/ESTC.2008.4684332
M. Bak, M. Dudek, A. Dziedzic, J. Kita
{"title":"Chosen electrical and stability properties of laser-shaped thick-film and LTCC inductors","authors":"M. Bak, M. Dudek, A. Dziedzic, J. Kita","doi":"10.1109/ESTC.2008.4684332","DOIUrl":"https://doi.org/10.1109/ESTC.2008.4684332","url":null,"abstract":"This paper presents fabrication as well as chosen electrical and stability properties of laser-shaped thick-film (made on alumina) and LTCC (with DP 951 ceramic tape as a substrate) inductors. Such components are made based on silver or palladium-silver inks with 14-16 ~m thickness. Inductance, resistance and quality factor, QL are determined in a wide frequency (10 kHz - 110 MHz) and temperature (20degC - 250degC) range and are analyzed as a function of inductor geometry (shape and width of conductive tracks) and metallurgy of conductive layer. The stability properties, i.e. fractional inductance and resistance changes after long-term thermal ageing at elevated temperature (150degC and/or 250degC, 250 hours each) are also investigated and analyzed.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128811816","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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