{"title":"优化100GHz多层电路封装布局的设计规则","authors":"A. Abeygunasekera, C. Free","doi":"10.1109/ESTC.2008.4684545","DOIUrl":null,"url":null,"abstract":"New data are presented on the effects of coupling between conductors in a highly integrated, multilayer circuit working at high millimeter wave frequencies. Design rules have been developed to summarize the results and provide guidance to the circuit designer on the minimum spacing between conductors in a multilayer package.","PeriodicalId":146584,"journal":{"name":"2008 2nd Electronics System-Integration Technology Conference","volume":"80 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design rules to optimize the layout of multilayer circuit packages at 100GHz\",\"authors\":\"A. Abeygunasekera, C. Free\",\"doi\":\"10.1109/ESTC.2008.4684545\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"New data are presented on the effects of coupling between conductors in a highly integrated, multilayer circuit working at high millimeter wave frequencies. Design rules have been developed to summarize the results and provide guidance to the circuit designer on the minimum spacing between conductors in a multilayer package.\",\"PeriodicalId\":146584,\"journal\":{\"name\":\"2008 2nd Electronics System-Integration Technology Conference\",\"volume\":\"80 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 2nd Electronics System-Integration Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESTC.2008.4684545\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 2nd Electronics System-Integration Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTC.2008.4684545","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design rules to optimize the layout of multilayer circuit packages at 100GHz
New data are presented on the effects of coupling between conductors in a highly integrated, multilayer circuit working at high millimeter wave frequencies. Design rules have been developed to summarize the results and provide guidance to the circuit designer on the minimum spacing between conductors in a multilayer package.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
