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Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93最新文献

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Timing-driven system partitioning by constraints decoupling method 基于约束解耦方法的定时驱动系统划分
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302133
M. Shih, E. Kuh, R. Tsay
{"title":"Timing-driven system partitioning by constraints decoupling method","authors":"M. Shih, E. Kuh, R. Tsay","doi":"10.1109/MCMC.1993.302133","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302133","url":null,"abstract":"A method called constraints decoupling for solving the MCM system partitioning problem under capacity and timing constraints is proposed. Advantage is taken of the small number of chip slots (compared to the large number of circuit components) and the problem is formulated as an integer programming problem. The dual-constraint problem is then decomposed into two independent single-constraint problems, which are much easier to solve. Experimental results indicate that all timing and capacity violations in the initial designs can be eliminated. One important application, solving practical MCM partitioning problems, is illustrated through 7 industrial examples. Extensive experiments confirmed the stability of the method.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132486059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Physical layout algorithms for computer generated holograms in optoelectronic MCM systems design 光电MCM系统设计中计算机生成全息图的物理布局算法
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302127
J. Fan, D. Zaleta, C.K. Cheng, S.H. Lee
{"title":"Physical layout algorithms for computer generated holograms in optoelectronic MCM systems design","authors":"J. Fan, D. Zaleta, C.K. Cheng, S.H. Lee","doi":"10.1109/MCMC.1993.302127","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302127","url":null,"abstract":"The fundamental computer generated hologram (CGH) fabrication and design limitations that greatly influence optoelectronic multichip module (OE-MCM) design are discussed. Physical models of free-space optical interconnects for OE-MCM are identified. Logical and mathematical models for analysis are then derived from these models. These cases are analyzed and an iterative algorithm to solve the layout problem is presented. The results of applying the algorithm to the OE-MCM design of a twin butterfly interconnection network are discussed.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"256 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132656217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Wave spreading evaluation of interconnect systems 互连系统的波传播评价
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302139
H. Liao, W. Dai
{"title":"Wave spreading evaluation of interconnect systems","authors":"H. Liao, W. Dai","doi":"10.1109/MCMC.1993.302139","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302139","url":null,"abstract":"General multiport interconnect constraints are derived and the wave spreading evaluation (WSE) approach, which uses S-parameter based network techniques to analyze coupled, multiconductor interconnect systems for high-speed analog and digital integrated circuits, is presented. WSE is based on the spreading process of voltage waves with initial spreading waves created by the initial sources. The spreading process is independent of input sources, and every step of wave spreading meets the constraints of KCL and KVL. The continual spreading of voltage waves creates accurate results. The convergence condition is always met for passive networks.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121828960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Lumped approximation of the characteristic impedance of the RLGC transmission line with error analysis RLGC传输线特性阻抗的集总近似及误差分析
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302141
O. Wing, H. Liu
{"title":"Lumped approximation of the characteristic impedance of the RLGC transmission line with error analysis","authors":"O. Wing, H. Liu","doi":"10.1109/MCMC.1993.302141","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302141","url":null,"abstract":"A family of lumped circuits whose input impedance approximates the characteristic impedance function of an RLGC transmission line is presented. The input impedance matches the characteristic impedance exactly at both zero and infinity in the frequency domain so that the initial value and the final value of its step response are exact. Each circuit is a cascade connection of N sections of a symmetric ladder network. A tight upper bound on the maximum relative error is derived and is explicitly given in terms of the line parameters and the number of sections N. It is demonstrated that for most practical cases, four sections, or a fourth order lumped circuit, are sufficient to yield a relative error not greater than 10/sup -7/.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127483849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Automatic a-priori generation of delay and noise macromodels and wiring rules for MCMs 自动先验生成延迟和噪声宏模型和布线规则的mcm
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302129
P. Franzon, S. Simovich, S. Mehrotra, M. Steer
{"title":"Automatic a-priori generation of delay and noise macromodels and wiring rules for MCMs","authors":"P. Franzon, S. Simovich, S. Mehrotra, M. Steer","doi":"10.1109/MCMC.1993.302129","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302129","url":null,"abstract":"The authors point out that the current approaches to generating wiring rules for high speed MCMs are unsatisfactory because they require intensive manual efforts to generate and they present an automated approach based on a-priori simulation-based characterization of the interconnect circuit configurations. The improved flexibility and accuracy provided by this approach, when compared with the rule of thumb approach, are demonstrated via an example.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117200668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Developing a merchant MCM infrastructure 开发商业MCM基础设施
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302154
N.J. Naclerio
{"title":"Developing a merchant MCM infrastructure","authors":"N.J. Naclerio","doi":"10.1109/MCMC.1993.302154","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302154","url":null,"abstract":"Summary form only given. Despite demand for higher performance, miniaturization, and more cost-effective subsystem packaging, potential users of MCM technology have been frustrated by long lead times, high costs, and perceived risks of depending upon an unproven supplier infrastructure. In order to address these issues, the application specific electronic module (ASEM) program has been established. The goal of that effect is to help create a viable domestic supplier infrastructure which can serve the needs of both military and commercial customers. The model for the ASEM concept is the merchant ASIC business. Goals for turn-around time, cost, and quality would be similar to what ASIC vendors offer today. Enabling technologies being developed include: (1) new software tools for design, manufacture, and test; (2) flexible manufacturing equipment and processes; and (3) brokering systems and technology to facilitate electronic interchange of ASEM product specifications and design data. These technologies will be integrated at several prototypical ASEM foundries to provide cost-effective, low volume, quick turn-around access as well as high-volume production capability.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121534979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
SuperSPARC multichip module SuperSPARC多芯片模块
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302158
A. Mehta, J. Kennedy, K. Johnson, F. Cano, D. Anderson, D. Chong, G. Hamilton, D. Brady, M. Murtuza, P. Hundt, N. Hong, F. Valente, S. Rusu, S. Kaul, T. Gannon
{"title":"SuperSPARC multichip module","authors":"A. Mehta, J. Kennedy, K. Johnson, F. Cano, D. Anderson, D. Chong, G. Hamilton, D. Brady, M. Murtuza, P. Hundt, N. Hong, F. Valente, S. Rusu, S. Kaul, T. Gannon","doi":"10.1109/MCMC.1993.302158","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302158","url":null,"abstract":"An experimental silicon-on-silicon MCM consisting of a SPARC processor, a cache controller and cache memory constructed to study the feasibility of thin film technology for high speed applications is discussed. Results of experiments show that such a design is viable. The trade-offs involved in the selection of a MCM for electrical, thermal and yield performance goals are discussed. Thin film technology provides a viable means of achieving these goals. The lossy nature of the thin film is used to provide series termination and allows high speed pulse propagation to be achieved. Also, the denser design rules permitted by the technology enable a smaller module size.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123180709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Development of the RIT infrastructure for design, fabrication and testing of small multichip modules 开发用于设计、制造和测试小型多芯片模块的RIT基础设施
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302151
P. R. Mukund, R. Pearson
{"title":"Development of the RIT infrastructure for design, fabrication and testing of small multichip modules","authors":"P. R. Mukund, R. Pearson","doi":"10.1109/MCMC.1993.302151","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302151","url":null,"abstract":"The infrastructural work in progress at the Rochester Institute of Technology in the area of the multichip modules is described. Facilities for design, fabrication and testing are being developed. Present capabilities as well as future goals are presented. The MCM effort is a joint effort between the Electrical Engineering department and the Microelectronic department. Issues related to design, simulation (electrical and thermal) and testing are being addressed in the Electrical Engineering department. Mask making, fabrication, and final packaging are being handled by the Microelectronic Engineering department. The facilities, technology and projects (ongoing and future) in this endeavor are considered.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129837389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An I/O CMOS buffer set for silicon multichip module's (MCM) 一种用于硅多芯片模块(MCM)的I/O CMOS缓冲装置
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302136
T. Gabara, W. Fischer, S. Knauer, R. Frye, K. Tai, M. Lau
{"title":"An I/O CMOS buffer set for silicon multichip module's (MCM)","authors":"T. Gabara, W. Fischer, S. Knauer, R. Frye, K. Tai, M. Lau","doi":"10.1109/MCMC.1993.302136","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302136","url":null,"abstract":"A set of I/O CMOS buffers for MCM is described. When simulation results of the MCM buffers are compared against conventional standard cell CMOS buffers, several advantages emerge. The results indicate that the new buffers dissipate 5 times less power, reduce propagation delay from chip core to another core from 3-6 nsec, and increase the frequency of operation by 2.5 times when compared to conventional CMOS buffers. Actual measurements between these buffers confirm these simulation results.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114343342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Transient simulation of frequency-dependent nonuniform coupled lossy transmission lines with double orthogonal expansions and recursive convolution integrations 基于双正交展开和递推卷积积分的频率相关非均匀耦合损耗传输线瞬态仿真
Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93 Pub Date : 1993-03-15 DOI: 10.1109/MCMC.1993.302137
F. Chang
{"title":"Transient simulation of frequency-dependent nonuniform coupled lossy transmission lines with double orthogonal expansions and recursive convolution integrations","authors":"F. Chang","doi":"10.1109/MCMC.1993.302137","DOIUrl":"https://doi.org/10.1109/MCMC.1993.302137","url":null,"abstract":"The most efficient method of simulating the transient response of frequency-dependent nonuniform lossy coupled transmission lines which are terminated in active nonlinear loads is presented. The transient simulation is carried out by applying recursive convolution integration with the impulse response functions derived from the orthogonal expansions of the transmission-line characteristics in both time and spatial domains. Transient responses of nonuniform coupled transmission lines with skin-effect parameters are simulated for illustrations. The accuracy and efficiency of the discrete-time analysis are substantiated with exact analytical solutions.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131609779","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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