2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)最新文献_第2页

High-Performance Fault Diagnosis Schemes for Efficient Hash Algorithm BLAKE 高效哈希算法BLAKE的高性能故障诊断方案

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667597

Mehran Mozaffari Kermani, Siavash Bayat Sarmadi, A.-Bon Ackie, R. Azarderakhsh

{"title":"High-Performance Fault Diagnosis Schemes for Efficient Hash Algorithm BLAKE","authors":"Mehran Mozaffari Kermani, Siavash Bayat Sarmadi, A.-Bon Ackie, R. Azarderakhsh","doi":"10.1109/LASCAS.2019.8667597","DOIUrl":"https://doi.org/10.1109/LASCAS.2019.8667597","url":null,"abstract":"Augmenting the security of cryptographic algorithms by protecting them against side-channel active attacks (and natural faults) is essential in cryptographic engineering. BLAKE algorithm is an efficient hash function which has been developed based on Bernstein’s ChaCha stream cipher. Because of the fact that Google has chosen ChaCha along with Bernstein’s Poly1305 message authentication code as a replacement for RC4 in TLS for Internet security, BLAKE’s implementation is of paramount importance. In this paper, we present high-performance fault detection schemes for BLAKE. Specifically, for the round function, two fault diagnosis approaches are developed and analyzed in terms of error detection capability and overhead. Through our injection-based error simulations, we show that the error coverage of almost 100% can be achieved for the proposed approaches. In addition, through hardware platform benchmarks, we show that the proposed architectures have implementations which reach acceptable area/delay overheads. The proposed high-performance fault diagnosis approaches will make the hardware implementations of BLAKE more reliable.","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115035036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

A Framework for Heterogeneous Many-core SoCs Generation 异构多核soc生成框架

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667590

Marcelo Ruaro, L. L. Caimi, Vinicius Fochi, F. Moraes

引用次数: 4

An Implementation of Extended Burst-Mode Specifications as Quasi Delay Insensitive State Machines 扩展突发模式规范作为准延迟不敏感状态机的实现

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667563

D. L. Oliveira, Orlando Verducci, Vitor L. V. Torres, G. Batista, R. Moreno, L. Romano

引用次数: 1

A High Throughput Hardware Architecture Targeting the AV1 Paeth Intra Predictor 一种针对AV1路径内预测器的高吞吐量硬件体系结构

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667544

M. Corrêa, Bianca Waskow, J. Goebel, D. Palomino, G. Corrêa, L. Agostini

引用次数: 4

A Black-box Model for Neurons 神经元的黑盒模型

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667586

N. Roqueiro, C. Claumann, A. Guillamón, E. Fossas

{"title":"A Black-box Model for Neurons","authors":"N. Roqueiro, C. Claumann, A. Guillamón, E. Fossas","doi":"10.1109/LASCAS.2019.8667586","DOIUrl":"https://doi.org/10.1109/LASCAS.2019.8667586","url":null,"abstract":"We explore the identification of neuronal voltage traces by artificial neural networks based on wavelets (Wavenet). More precisely, we apply a modification in the representation of dynamical systems by Wavenet which decreases the number of used functions; this approach combines localized and global scope functions (unlike Wavenet, which uses localized functions only). As a proof-of-concept, we focus on the identification of voltage traces obtained by simulation of a paradigmatic neuron model, the Morris-Lecar model. We show that, after training our artificial network with biologically plausible input currents, the network is able to identify the neuron’s behaviour with high accuracy, thus obtaining a black box that can be then used for predictive goals. Interestingly, the interval of input currents used for training, ranging from stimuli for which the neuron is quiescent to stimuli that elicit spikes, shows the ability of our network to identify abrupt changes in the bifurcation diagram, from almost linear input-output relationships to highly nonlinear ones. These findings open new avenues to investigate the identification of other neuron models and to provide heuristic models for real neurons by stimulating them in closed-loop experiments, that is, using the dynamic-clamp, a well-known electrophysiology technique.","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126765000","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Dependency-Free Real-Time UHD Architecture for the Initial Stage of HEVC Motion Estimation 一种用于HEVC运动估计初始阶段的无依赖实时超高清架构

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667555

Haris Chaudhry, Mario Raffo-Jara, C. S. Cárdenas, Cristopher Villegas

{"title":"A Dependency-Free Real-Time UHD Architecture for the Initial Stage of HEVC Motion Estimation","authors":"Haris Chaudhry, Mario Raffo-Jara, C. S. Cárdenas, Cristopher Villegas","doi":"10.1109/LASCAS.2019.8667555","DOIUrl":"https://doi.org/10.1109/LASCAS.2019.8667555","url":null,"abstract":"Novel coding tools and algorithms were proposed in the High Efficiency Video Coding Standard (HEVC), and are still being proposed over the HM reference software in order to achieve a better compression efficiency, decrease encoding time, make its stages suitable for hardware implementation, and other independent improvements. Particularly, for the initial stage of the motion estimation (ME) process, the Advanced Motion Vector Prediction (AMVP) and the Dynamic Search Range (DSR) algorithms were introduced in the field targeting the determination of the motion vector predictor (MVP), also used as the search center, and search range (SR), which are parameters needed in the subsequent steps of motion estimation (ME). However, the significant complexity of these new tools enhances the need to develop hardware (HW) accelerators. Furthermore, in the field of HW architectures for video compression, techniques that solve dependency problems (which are detrimental to performance) — in this case, between sub-stages of ME— were proposed by some authors. Thereupon, an integrated and synchronized dependency-free HW architecture for the initial stage of the ME process — regarding MV prediction and SR calculation— is proposed in this paper. Synthesis results on a middle ground FPGA (Kintex-7 xc7k70tfbv676-1) show that the integrated architecture can achieve a throughput up to 8K at 72 frames-per-second (4:2:2 subsampling) while using a maximum of 7.04% of the FPGA resources (on slice LUT’s).","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"89 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126319407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

CNN Learning for Image Processing: Center of Mass versus Genetic Algorithms CNN图像处理学习:质量中心与遗传算法

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667559

F. Andrade, E. Santana, A. Cunha, E. F. S. Filho, Gabriele Costa Goncalves, Antonio José Sobrinho de Sousa

引用次数: 2

Smart Water Management System using the Microcontroller ZR16S08 as IoT Solution 采用ZR16S08单片机作为物联网解决方案的智能水管理系统

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667571

M. R. Machado, T. Junior, Michele R. Silva, J. B. Martins

{"title":"Smart Water Management System using the Microcontroller ZR16S08 as IoT Solution","authors":"M. R. Machado, T. Junior, Michele R. Silva, J. B. Martins","doi":"10.1109/LASCAS.2019.8667571","DOIUrl":"https://doi.org/10.1109/LASCAS.2019.8667571","url":null,"abstract":"This paper presents a smart water management system using the microcontroller ZR16S08 as IoT solution, for water distribution support and losses prevention. The system operates through the smart monitoring of the water flow in pipes of the water distribution network, aiming to ensure quality of the water supply, knowing that water losses characterize one of the great problems in the world, as pipe holes may be open doors to water contaminants. As an alternative to circumvent this issue, a series of experiments were taken to create a network of sensors capable of monitoring water pipes in real time. Adopting criteria such as low consumption and low cost, the use the ZR16S08 microcontroller in the design of wireless sensor nodes that will be coupled in the water pipes was adopted. Complementing the system, a central processing unit, composed of a Raspberry Pi microcomputer, manages the traffic of the information collected by the sensor nodes and routes it to a web server. All data addressed by the central unit are available on-line by means of a supervisory platform. Considering the size of the sensor nodes, their power consumption, and regulatory issues, a link between the sensor nodes, operating at a frequency of 433 MHz, was defined. Preliminary results show the effectiveness of the proposed architecture for sensor nodes, allowing application for the monitoring of water and controlling losses.","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128134135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 22

Performance evaluation of Tunnel-FET basic amplifier circuits 隧道场效应管基本放大电路的性能评价

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667587

R. Rangel, P. Agopian, J. Martino

引用次数: 10

Mapping and Placement in NoC-based Reconfigurable Systems Using an Adaptive Tabu Search Algorithm 基于noc的可重构系统中自适应禁忌搜索算法的映射与布局

2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) Pub Date : 2019-02-01 DOI: 10.1109/LASCAS.2019.8667553

Guilherme Apolinario Silva Novaes, L. C. Moreira, W. Chau

引用次数: 3