A Framework for Heterogeneous Many-core SoCs Generation

Abstract

This work presents a framework for heterogeneous many-core SoCs generation, which comprises a flexible EDA (Electronic Design Automation) framework and a many-core model for heterogeneous SoCs. The framework together with the many-core model supports the integration of processors, network interfaces, routers, and peripherals. The hardware model is cycleaccurate, with a SystemC model to speed up simulation time and a VHDL model enabling prototyping in FPGAs devices. The framework provides a rich set of graphical debugging tools enabling an easy and intuitive understanding of computation and communication events happening at runtime. The coupled integration of the platform model to the EDA framework makes the many-core well suited to be employed in research and teaching. As case-study, we provide an evaluations addressing the many-core generation, simulation, and debugging.