A High Throughput Hardware Architecture Targeting the AV1 Paeth Intra Predictor

Abstract

AV1 is an open-source and royalty-free video coding format, which was developed by the AOMedia industry consortium and released in June 2018 as the state-of-the-art in video coding. The main goal of AV1 development was to achieve substantial compression gain over high-performance codecs such as VP9 and HEVC, while keeping a practical decoding complexity, hardware feasibility and its open and free status. This paper presents a highly parallelized hardware architecture for the AV1 Paeth intra predictor supporting all 19 block sizes allowed, capable of processing UHD 4K videos at 120 frames per second. When synthesized to the TSMC 40nm cell library targeting a frequency of 315MHz, the proposed design used 247.28K gates and showed a power dissipation and an energy efficiency of 268.36mW and 179.74pJ/sample respectively.