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An Integrated Regulated Resonant Switched-Capacitor DC-DC Converter For PoL Applications 一种用于PoL应用的集成调谐谐振开关电容DC-DC变换器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-06-26 DOI: 10.1109/APEC.2019.8722136
G. Ripamonti, S. Michelis, Mario Ursino, S. Saggini, F. Faccio
{"title":"An Integrated Regulated Resonant Switched-Capacitor DC-DC Converter For PoL Applications","authors":"G. Ripamonti, S. Michelis, Mario Ursino, S. Saggini, F. Faccio","doi":"10.1109/APEC.2019.8722136","DOIUrl":"https://doi.org/10.1109/APEC.2019.8722136","url":null,"abstract":"This paper proposes an integrated regulated resonant switched-capacitor DC-DC converter for a 2.5 V to 1.2 V, 3 A conversion designed in a 130 nm CMOS technology. The voltage is regulated through a combined frequency/time shift on-chip controller that operates thanks to a zero-crossing detector for the tank current. By using such control technique, an output voltage greater than Vin/2 can be reached. The integrated circuit also implements a medium-load and a light-load control modes that maximize the efficiency at every load condition. The external resonant tank is composed of a 12 nH air-core inductor and a 4.7 μF capacitor in a 0805 package, achieving high power density. In this paper, the operation principle and the control techniques are discussed, demonstrating that the inductor value can be reduced by a factor of more than 8 compared to an integrated buck converter designed for the same application, without incurring in a significant efficiency degradation.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122048893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Ultra-High Power Density Magnetic-less DC/DC Converter Utilizing GaN Transistors 利用GaN晶体管的超高功率密度无磁DC/DC变换器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-27 DOI: 10.1109/APEC.2019.8721783
G. Kampitsis, R. V. Erp, E. Matioli
{"title":"Ultra-High Power Density Magnetic-less DC/DC Converter Utilizing GaN Transistors","authors":"G. Kampitsis, R. V. Erp, E. Matioli","doi":"10.1109/APEC.2019.8721783","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721783","url":null,"abstract":"In this paper, a high step-up magnetic-less DC/DC nX converter is designed and experimentally evaluated. GaN transistors are applied in a nX converter topology, yielding ultrahigh power density and high conversion efficiency. The absence of magnetic materials results in a constant efficiency throughout the power range; the power capability of the system is only limited by the ratings of the semiconductor devices. To effectively extract the dissipated power, a novel micro-fluidic heat sink is designed, based on microchannels fabricated on Silicon substrate and a laser-cut acrylic manifold. The developed liquid cooling heat sink yields a much smaller volume and higher cooling capability compared to conventional heat sinks. A 10X converter prototype with the integrated micro-fluidic heat sink is experimentally evaluated at various operating conditions and different flow rates for the cooling system. At a transferred power of 1.2 kW the converter exhibits an overall efficiency of 96%, while occupying 260 mL of volume, resulting in 4.62 W/cm3, a notable power density for such a high step-up DC/DC converter.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116040560","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A manifold microchannel heat sink for ultra-high power density liquid-cooled converters 一种用于超高功率密度液冷转换器的流形微通道散热器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-27 DOI: 10.1109/APEC.2019.8722308
R. V. Erp, G. Kampitsis, E. Matioli
{"title":"A manifold microchannel heat sink for ultra-high power density liquid-cooled converters","authors":"R. V. Erp, G. Kampitsis, E. Matioli","doi":"10.1109/APEC.2019.8722308","DOIUrl":"https://doi.org/10.1109/APEC.2019.8722308","url":null,"abstract":"Increase in heat fluxes as a result of the miniaturization of power electronics demands new thermal management solutions such as liquid cooling, because of its high heat extraction capabilities. This work describes a new silicon-based heat sink that takes advantage of the high heat extraction capability of microchannel liquid-cooling at low power consumption by co-designing the heat sink and the electronics. A simple combination of cleanroom microfabricated silicon and laser-cutting of plastics was employed to make a microchannel heat sink that simultaneously cools down 20 active devices (hotspots) of a power electronic converter. By flowing liquid close to the active devices through narrow microchannels, we show that the power requirements of the pump can be minimized, resulting in a compact cooling system that allows integration with small and energy-efficient micropumps. The manifold microchannel heatsink is demonstrated on a ultra-high power density magnetic-less 10x-step-up DC/DC converter resulting in a smaller volume and higher cooling capability than conventional heat sinks. The converter was tested up to an output power of 1.2 kW, with an overall efficiency of 96%, and an average temperature rise of only 12.6 °C. The converter and heatsink occupy a volume of 260 mL, resulting in a maximum demonstrated power density of 4.62 W/cm3, and a potential to reach a power density up to 26.9 W/cm3.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114218534","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
A High-Efficiency Super-Junction MOSFET based Inverter-Leg Configuration using a Dual-Mode Switching Technique 基于双模开关技术的高效超结MOSFET逆变腿结构
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-27 DOI: 10.1109/APEC.2019.8721853
Zheng Feng, N. McNeill, B. Williams
{"title":"A High-Efficiency Super-Junction MOSFET based Inverter-Leg Configuration using a Dual-Mode Switching Technique","authors":"Zheng Feng, N. McNeill, B. Williams","doi":"10.1109/APEC.2019.8721853","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721853","url":null,"abstract":"High-efficiency power converters have benefits of minimizing energy consumption, reducing costs, and realizing high power densities. The silicon super-junction MOSFET is an attractive device for high-efficiency applications. However, its highly non-linear output capacitance and the reverse recovery properties of its intrinsic diode must be addressed when used in voltage source converters. A dual-mode switching technique operating in conjunction with intrinsic diode deactivation circuitry is proposed in this paper. The technique is demonstrated in an 800-W inverter-leg configuration operating from a 400-V DC voltage rail and switching at 20 kHz. Intended applications include machine drives. The full-load efficiency reaches approximately 98.7% and no forced cooling is needed.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125772557","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Current Source Gate Driver for Series Connected Silicon-Carbide (SiC) MOSFETs 串联式碳化硅(SiC) mosfet的电流源栅极驱动器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-24 DOI: 10.1109/APEC.2019.8721929
Chunhui Liu, Qin Lei
{"title":"Current Source Gate Driver for Series Connected Silicon-Carbide (SiC) MOSFETs","authors":"Chunhui Liu, Qin Lei","doi":"10.1109/APEC.2019.8721929","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721929","url":null,"abstract":"SiC MOSFET has superior switching performance over Si IGBT in terms of power loss and temperature characteristics. In order to significantly improve the efficiency and power density of medium voltage drive and high-power converters. In this paper, series connected SiC MOSFETs are used to replace the high voltage Si IGBT. Specifically, a game changing and universally applicable standard block of \"series connected SiC MOSFETs\" with excellent dynamic voltage sharing and high reliability is proposed. The core technology in the block is the current source gate driver with device synchronization function.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"14 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120871257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Simplified Multi-time Scale Thermal Model Considering Thermal Coupling in IGBT Modules 考虑IGBT模块热耦合的简化多时间尺度热模型
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-24 DOI: 10.1109/APEC.2019.8721898
Yi Zhang, Huai Wang, Zhongxu Wang, F. Blaabjerg
{"title":"Simplified Multi-time Scale Thermal Model Considering Thermal Coupling in IGBT Modules","authors":"Yi Zhang, Huai Wang, Zhongxu Wang, F. Blaabjerg","doi":"10.1109/APEC.2019.8721898","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721898","url":null,"abstract":"In the reliability evaluation of power electronic systems, one of the challenges is to model the thermal profiles across multiple time scales, i.e., from switching cycles at nano-or micro-seconds to annual or even longer-time mission profiles. Without consideration of the dissimilarity of thermal behaviors under different time scales, a single thermal model usually leads to either considerable modeling errors or heavy computational burden. Based on the frequency response of thermal impedances, this paper proposes a novel and simplified thermal model to analyze mission profiles with multiple time scales. It enables a computational-efficient thermal stress analysis for power semiconductors, including the thermal coupling in device packages. The theoretical results are verified by experimental testing.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115340708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A 6-level Flying Capacitor Multi-level Converter for Single Phase Buck-type Power Factor Correction 一种用于单相降压型功率因数校正的6电平飞容多级变换器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-24 DOI: 10.1109/APEC.2019.8722199
Enver Candan, Andrew Stillwell, Nathan C. Brooks, Rose A. Abramson, J. Strydom, R. Pilawa-Podgurski
{"title":"A 6-level Flying Capacitor Multi-level Converter for Single Phase Buck-type Power Factor Correction","authors":"Enver Candan, Andrew Stillwell, Nathan C. Brooks, Rose A. Abramson, J. Strydom, R. Pilawa-Podgurski","doi":"10.1109/APEC.2019.8722199","DOIUrl":"https://doi.org/10.1109/APEC.2019.8722199","url":null,"abstract":"This work investigates behavior of flying capacitor multi-level (FCML) converters in single phase buck-type power factor correction (PFC) applications. Recent developments in FCML converters using GaN transistors are leveraged to improve power density of a single-phase 240 VRMS ac to direct 48 V dc conversion stage in data center power delivery applications. Here, we experimentally demonstrate this concept by using a digitally controlled 6-level FCML converter. The experimental prototype achieves 163 W/in3 by box volume excluding heat sink and twice-line frequency energy buffer. A key contribution of this work is experimental exploration of flying capacitor natural balancing of an FCML buck converter in a single-phase ac-dc conversion where the flying capacitor voltages must swing at 120 Hz.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":" 64","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113948023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
High-Speed Searching of Optimum Switching Pattern for Digital Active Gate Drive Circuit of Full Bridge Inverter Circuit 全桥逆变电路数字有源门驱动电路最佳开关方式的高速搜索
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-24 DOI: 10.1109/APEC.2019.8721798
Y. Cheng, Tomoyuki Mannen, K. Wada, K. Miyazaki, M. Takamiya, T. Sakurai
{"title":"High-Speed Searching of Optimum Switching Pattern for Digital Active Gate Drive Circuit of Full Bridge Inverter Circuit","authors":"Y. Cheng, Tomoyuki Mannen, K. Wada, K. Miyazaki, M. Takamiya, T. Sakurai","doi":"10.1109/APEC.2019.8721798","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721798","url":null,"abstract":"Active gate drive technique enables the adjustability of driving waveform for individual time interval and improves switching characteristics of power device. To be further efficient in search of optimal driving pattern for digital gate drive IC, this paper put a focus on design framework of driving pattern. In fact, the design framework of driving pattern has the direct impact on how sophisticated is the driving waveform. The more detailed is the pattern framework, the more complicated is the searching issues. Thus, it causes longer searching time and requires much computation effort. Based on typical optimization algorithm, the aim is to conserve computation time and reach to an improved switching performance. The objective function is formulated for switching loss reduction and suppression of surge voltage. Firstly, three horizontal configurations with different resolution degree for driving pattern are given. Next, individual optimization is carried out for each case. Based on a full bridge inverter with active gate driver, an online optimization platform is utilized to analyze the design framework of optimal driving pattern. At the end, the obtained driving pattern is able to reduce 33% of switching loss and constrain surge voltage below 10% of input voltage compared to conventional driving method. Compared to previous study, the searching time is shorten by 90%.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113959814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A Simple Technique for In-circuit Core Loss Measurement of Medium Frequency Transformer 一种简单的中频变压器铁心损耗在线测量技术
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-24 DOI: 10.1109/APEC.2019.8721933
Zhengda Zhang, Lei Zhang, Jiangchao Qin
{"title":"A Simple Technique for In-circuit Core Loss Measurement of Medium Frequency Transformer","authors":"Zhengda Zhang, Lei Zhang, Jiangchao Qin","doi":"10.1109/APEC.2019.8721933","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721933","url":null,"abstract":"Medium frequency transformer (MFT) is considered to be the key element in a solid state transformer (SST). Compared to the conventional line-frequency transformer, the MFT has much reduced volume and weight. However, the MFT suffers from higher core loss due to its medium operating frequency. Normally, the MFT core loss is experimentally measured by open-circuit test, when the magnetizing voltage and magnetizing current are measurable. Whenever the MFT is not open-circuited, the direct in-circuit core loss measurement is impractical. In this paper, a simple technique is proposed to achieve the in-circuit core loss measurement for the MFT under arbitrary excitation voltage waveforms and various load conditions. The operating principle and key steps of the proposed measurement are explained in details. The accuracy of the proposed measurement technique is verified by a resistive load experimental test under both sinusoidal and non-sinusoidal excitation voltages.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117005125","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Component Sizing and Voltage Balancing of MMC-based Solid-State Transformers Under Various AC-Link Excitation Voltage Waveforms 基于mmc的固态变压器在各种交流链路激励电压波形下的元件尺寸和电压平衡
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-05-24 DOI: 10.1109/APEC.2019.8721891
Lei Zhang, Jiangchao Qin, Qing Duan, W. Sheng
{"title":"Component Sizing and Voltage Balancing of MMC-based Solid-State Transformers Under Various AC-Link Excitation Voltage Waveforms","authors":"Lei Zhang, Jiangchao Qin, Qing Duan, W. Sheng","doi":"10.1109/APEC.2019.8721891","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721891","url":null,"abstract":"Modular multilevel converter (MMC) has been employed for solid state transformer (SST) applications. For the MMC-based SSTs, ac-link excitation voltage waveforms are multilevel and controllable for energizing medium-frequency transformers. Different multilevel ac-link voltage waveforms have different performance and specification requirements in design and control. In this paper, power transfer characteristics and capacitor voltage ripple are investigated for the MMC-SSTs under different ac-link excitation voltage waveforms, i.e., sinusoidal and generalized non-sinusoidal voltages. Based on the analysis, capacitance and inductance sizing method is developed and verified. To address voltage balancing issue of the MMC under medium-frequency operating conditions, various capacitor voltage balancing methods are evaluated and compared based on phase-shift modulation and nearest-level modulation methods. The study is conducted in the PSCAD/EMTDC software environment. The study results show that, for the same design specifications, different ac-link excitation voltage waveforms have different capacitance requirements, which can be used for optimization design of the MMC-SSTs.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128219582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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