High-Speed Searching of Optimum Switching Pattern for Digital Active Gate Drive Circuit of Full Bridge Inverter Circuit

Abstract

Active gate drive technique enables the adjustability of driving waveform for individual time interval and improves switching characteristics of power device. To be further efficient in search of optimal driving pattern for digital gate drive IC, this paper put a focus on design framework of driving pattern. In fact, the design framework of driving pattern has the direct impact on how sophisticated is the driving waveform. The more detailed is the pattern framework, the more complicated is the searching issues. Thus, it causes longer searching time and requires much computation effort. Based on typical optimization algorithm, the aim is to conserve computation time and reach to an improved switching performance. The objective function is formulated for switching loss reduction and suppression of surge voltage. Firstly, three horizontal configurations with different resolution degree for driving pattern are given. Next, individual optimization is carried out for each case. Based on a full bridge inverter with active gate driver, an online optimization platform is utilized to analyze the design framework of optimal driving pattern. At the end, the obtained driving pattern is able to reduce 33% of switching loss and constrain surge voltage below 10% of input voltage compared to conventional driving method. Compared to previous study, the searching time is shorten by 90%.