2019 IEEE Applied Power Electronics Conference and Exposition (APEC)最新文献

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An Improved Design Method for Gapped Inductors Considering Fringing Effect 一种考虑条纹效应的改进的间隙电感设计方法
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8721811
Zhe Yang, H. Suryanarayana, Fred Wang
{"title":"An Improved Design Method for Gapped Inductors Considering Fringing Effect","authors":"Zhe Yang, H. Suryanarayana, Fred Wang","doi":"10.1109/APEC.2019.8721811","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721811","url":null,"abstract":"This paper proposes a simple and accurate design method for air gapped inductors. Using inductor models with fringing effect, the proposed method systematically evaluates possible combinations of cores, turn numbers, and air gap lengths within the given constraints, including core geometries and magnetic saturation. Design examples show that the proposed method reduces the number of turns as well as the core size compared to the conventional methods. The method features simplicity in both algorithm and calculation since it only requires a small number of iteration loops. Various models involved in inductor design, including inductance, flux density, loss and thermal, can be readily incorporated into the proposed method.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130691519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Hybrid Modulated Reconfigurable Bidirectional CLLC Converter for V2G Enabled PEV Charging Applications 用于V2G使能PEV充电应用的混合调制可重构双向CLLC转换器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8721807
Umar Khalid, Dongdong Shu, Hao Wang
{"title":"Hybrid Modulated Reconfigurable Bidirectional CLLC Converter for V2G Enabled PEV Charging Applications","authors":"Umar Khalid, Dongdong Shu, Hao Wang","doi":"10.1109/APEC.2019.8721807","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721807","url":null,"abstract":"In wide voltage range applications such as vehicle-to-grid enabled onboard charging, conventional frequency modulated bidirectional CLLC topology has its intrinsic limitations. Its frequency span is extremely wide and the soft switching feature might get lost. To cope with this issue, this paper proposes a novel reconfigurable bidirectional CLLC derived resonant topology. The reconfiguration of half-bridge and full-bridge is enabled on both the primary and secondary sides to extend its voltage gain range. Pulse width and frequency hybrid modulation is adopted to narrow down its switching frequency span. The operating principles, circuit modeling, and the design methodology are presented in detail. A simulation model of 1 kW rated converter is built to realize an efficient power conversion between 400 V dc bus and 100-440 Vdc battery pack. The simulation results validate the effectiveness of the proposed topology and modulation method.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129073137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Solution for Selective Harmonic Elimination in Asymmetric Multilevel Inverter Based on Stochastic Configuration Network and Levenberg-Marquardt Algorithm 基于随机组态网络和Levenberg-Marquardt算法的非对称多电平逆变器选择性谐波消除方法
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8722057
Jun Hao, Guoshan Zhang, Yuqing Zheng, Wei Hu, Kehu Yang
{"title":"Solution for Selective Harmonic Elimination in Asymmetric Multilevel Inverter Based on Stochastic Configuration Network and Levenberg-Marquardt Algorithm","authors":"Jun Hao, Guoshan Zhang, Yuqing Zheng, Wei Hu, Kehu Yang","doi":"10.1109/APEC.2019.8722057","DOIUrl":"https://doi.org/10.1109/APEC.2019.8722057","url":null,"abstract":"A hybrid method based on stochastic configuration networks (SCNs) and Levenberg-Marquardt (LM) algorithm is proposed to generate switching angles of selective harmonic elimination for asymmetric multilevel inverter, which makes a compromise among the optimal neurons in neural networks, executing efficiency and the solution precision. Unlike the other artificial neural network (ANN) based methods which use ANN to directly give the final switching angles, this hybrid method just uses SCNs to give switching angles initial values, which greatly lowers the training precision requirement, and requires less on-chip memories for weights and biases of neural networks. Then LM algorithm is used to solve the exact switching angles from the initial values given by SCNs, which guarantees the solving efficiency and the switching angles precision. The case of 7-level asymmetric multilevel inverter with 3 groups of unequal dc-link voltages in the full range of modulation indexes is studied. Compared to the high dimensional look-up table method, data storage space of the hybrid method is decreased by 92%, and the errors of solutions for switching angles are 1e-2 degrees. The results of simulation illustrate SHE switching angles generated by proposed method can effectively eliminate 5th-, 7th-order harmonics while retaining the desired fundamental.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129216668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Power Pulsation Decoupling in a Series-Stacked PV- Battery Inverter 串联堆叠光伏电池逆变器的功率脉动解耦
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8721940
Namwon Kim, B. Parkhideh
{"title":"Power Pulsation Decoupling in a Series-Stacked PV- Battery Inverter","authors":"Namwon Kim, B. Parkhideh","doi":"10.1109/APEC.2019.8721940","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721940","url":null,"abstract":"This paper presents the design of an energy buffer decoupling double-line-frequency AC power pulsation from main DC power sources in the single-phase series-stacked PV-battery inverter. As the active decoupling technique reducing the amount of capacitance required to stabilize the DC-bus voltage and achieving elimination of electrolytic capacitors, the series-stacked buffer architecture is adopted. In this work, the focus is on the optimization of the buffer design in the series-stacked PV-battery inverter and presenting the control scheme of the partial-power DC-DC optimizer to avoid processing the double-line-frequency AC current through all the DC sources: a PV string and a battery. The steady-state operation of the AC power pulsation decoupling of the series-stacked PV-battery inverter is demonstrated and verified through the controller hardware-in-the-loop test.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132432418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An Investigation on Fully Zero-Voltage-Switching Condition for High-Frequency GaN Based LLC Converter in Solid-State-Transformer Application 固态变压器中高频GaN基LLC变换器全零电压开关条件的研究
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8721789
Hao Wen, Jinwu Gong, Chih-Shen Yeh, Yaofei Han, J. Lai
{"title":"An Investigation on Fully Zero-Voltage-Switching Condition for High-Frequency GaN Based LLC Converter in Solid-State-Transformer Application","authors":"Hao Wen, Jinwu Gong, Chih-Shen Yeh, Yaofei Han, J. Lai","doi":"10.1109/APEC.2019.8721789","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721789","url":null,"abstract":"LLC resonant converter can help achieve soft switching for both primary side and secondary side devices, which makes it a great candidate for today’s high-frequency, high-efficiency and high power density solid state transformer (SST) applications. For cases to achieve a constant DC output voltage, it is desired that the LLC converter works in the zero-voltage-switching (ZVS) region that the switching frequency (fs) is smaller than the resonant frequency (fr). However, when a much wider frequency modulation range with ZVS guaranteed is needed to achieve a wide output voltage range and a variable load, the region that fs is larger than fr is the better choice. This region, which is rarely analyzed in the literature, is investigated in this paper. Detailed analysis for charging/discharging process during deadtime is shown. A simple but accurate model to determine fully ZVS condition in this region is proposed, which can also be used for deadtime optimization. Moreover, a 1 MHz/2 kW GaN based LLC converter prototype is built and presented for verification.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132768437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Empirical Circuit Model for Output Capacitance Losses in Silicon Carbide Power Devices 碳化硅功率器件输出电容损耗的经验电路模型
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8721907
Zikang Tong, Sanghyeon Park, J. Rivas-Davila
{"title":"Empirical Circuit Model for Output Capacitance Losses in Silicon Carbide Power Devices","authors":"Zikang Tong, Sanghyeon Park, J. Rivas-Davila","doi":"10.1109/APEC.2019.8721907","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721907","url":null,"abstract":"In recent reports, a variety of power devices, including wide-bandgap transistors, SiC diodes, and Si superjuction MOSFETs, exhibit losses occurring from hysteretic charging and discharging of their output capacitance (COSS for MOSFETs and CJ for Schottky diodes). In many instances and soft-switching power converter applications, these losses are comparable to conduction losses, especially for HF/VHF switching frequencies. Manufacturer SPICE models and datasheets do not report these losses, and are why device power dissipation in simulation significantly contrasts with that in actual converters. However, we propose a viable empirical circuit model that incorporates these losses, with capabilities to integrate into circuit simulation tools such as SPICE. We, in addition, demonstrate the model by comparing device power dissipation in a class-E inverter and class-E rectifier between simulation and implementation.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133455878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 30kW Three-Phase Voltage Source Inverter Based on The Si IGBT/SiC MOSFET Hybrid Switch 基于Si IGBT/SiC MOSFET混合开关的30kW三相电压源逆变器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8721835
Lei Li, P. Ning, X. Wen, Qiongxuan Ge, Yao-hua Li
{"title":"A 30kW Three-Phase Voltage Source Inverter Based on The Si IGBT/SiC MOSFET Hybrid Switch","authors":"Lei Li, P. Ning, X. Wen, Qiongxuan Ge, Yao-hua Li","doi":"10.1109/APEC.2019.8721835","DOIUrl":"https://doi.org/10.1109/APEC.2019.8721835","url":null,"abstract":"Hybrid switch (HyS) consisting of the paralleled silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs) and silicon (Si) insulated gate bipolar transistors (IGBTs) is proposed for high switching frequency and high efficiency at a reasonable cost. In this paper, a compact HyS three-phase full-bridge power module, rated at 1200 V/200 A, was fabricated in house and fully tested for the first time. To minimize HyS power loss, the turn-on gate signals are applied to the Si IGBTs and the SiC MOSFETs simultaneously while a prior turn-off period exists between the turn-off gate signals of the Si IGBTs and the SiC MOSFETs. The prior turn-off period is selected through the double pulse test. Based on the HyS power module, a 30 kW three-phase voltage source inverter was developed.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130474347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Optimized Design of Integrated PCB-Winding Transformer for MHz LLC Converter 用于MHz LLC变换器的集成pcb绕组变压器优化设计
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8722181
Yinsong Cai, M. Ahmed, Qiang Li, F. Lee
{"title":"Optimized Design of Integrated PCB-Winding Transformer for MHz LLC Converter","authors":"Yinsong Cai, M. Ahmed, Qiang Li, F. Lee","doi":"10.1109/APEC.2019.8722181","DOIUrl":"https://doi.org/10.1109/APEC.2019.8722181","url":null,"abstract":"Intermediate bus architecture employing 48V Bus converters are widely used in power supply applications. With the rapid increase of demanded power by these load, higher efficiency and power density are driving for better performance power management solutions. In this paper, Gallium Nitride (GaN) based design of a two-stage solution is proposed. The first stage is a multi-phase buck for regulation. The second stage is an LLC converter with fixed switching frequency for isolation. The design and optimization of LLC matrix transformer are studied. A novel primary termination and via structure is proposed resulting in great loss reduction. In addition, to minimize the winding loss, an overlapped winding structure and a symmetrical winding layer scheme are proposed to reduce and balance the MMF. These efforts achieve much better current sharing and efficiency. The prototype for the two-stage converter is developed, with the peak efficiency of 96% and the power density of 680W/in3.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"151 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132003964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
A High-Power-Density Electrolytic-Free Offline LED Driver Utilizing a Merged Energy Buffer Architecture 利用合并能量缓冲架构的高功率密度无电解脱机LED驱动器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8722022
Mausamjeet Khatua, Danish Shahzad, Saad Pervaiz, K. Afridi
{"title":"A High-Power-Density Electrolytic-Free Offline LED Driver Utilizing a Merged Energy Buffer Architecture","authors":"Mausamjeet Khatua, Danish Shahzad, Saad Pervaiz, K. Afridi","doi":"10.1109/APEC.2019.8722022","DOIUrl":"https://doi.org/10.1109/APEC.2019.8722022","url":null,"abstract":"This paper presents a high-power-density high-efficiency single-phase electrolytic-free offline LED driver that utilizes a novel energy buffer architecture for twice-line-frequency energy buffering. The proposed LED driver comprises two stages: a front-end power factor correction stage, followed by a merged energy- buffering/dc-dc conversion stage. The proposed merged energy buffer architecture reduces the step-down voltage conversion ratio requirement of the second stage dc-dc converter, thus improving its efficiency. This buffer architecture also increases the energy utilization of the buffer capacitors, thus reducing the passive volume of the energy buffer. The PFC stage is realized using a four- switch buck-boost converter and an LLC resonant converter is used to realize the second stage dc-dc converter. A 150-W prototype LED driver utilizing the proposed merged energy buffer is designed, built and tested and the experimental results are presented. The PFC stage maintains a high power factor and achieves a peak efficiency of 97% while the LLC stage achieves a peak efficiency of 93%. The prototype LED driver achieves a power density of 50 W/inch3, while replacing electrolytic capacitors with much lower energy density ceramic capacitors.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132561761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Fixed Frequency Phase Shift Modulated LLC Resonant Converter Adapted to Ultra Wide Output Voltage Range 适应超宽输出电压范围的定频移相调制LLC谐振变换器
2019 IEEE Applied Power Electronics Conference and Exposition (APEC) Pub Date : 2019-03-17 DOI: 10.1109/APEC.2019.8722285
Qi Cao, Zhiqing Li, Bo Xue, Hao Wang
{"title":"Fixed Frequency Phase Shift Modulated LLC Resonant Converter Adapted to Ultra Wide Output Voltage Range","authors":"Qi Cao, Zhiqing Li, Bo Xue, Hao Wang","doi":"10.1109/APEC.2019.8722285","DOIUrl":"https://doi.org/10.1109/APEC.2019.8722285","url":null,"abstract":"Conventional frequency modulated LLC topology is unsuitable for ultra wide voltage range applications and suffers from poor voltage regulation performance at light load conditions. To cope with those issues, this paper proposes a novel two-phase dual LLC resonant converter. Both resonant tanks are driven by two fixed-frequency square waves, whose frequencies are always tuned at the optimal resonant frequency. A phase shift is introduced between those two square waves to regulate the output voltage. The proposed topology demonstrates good voltage regulation performance, which is weakly dependent on the load condition. Zero-voltage switching and zero-current switching are well realized on the power MOSFETs and diodes in a wide range. A 1 kW rated laboratory prototype is designed to convert 390 V input to 100-420 V output. The prototype demonstrates a 98.2% peak efficiency and good voltage regulation capability. The experimental results agree well with the theoretical analysis.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129776227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
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