{"title":"Power Pulsation Decoupling in a Series-Stacked PV- Battery Inverter","authors":"Namwon Kim, B. Parkhideh","doi":"10.1109/APEC.2019.8721940","DOIUrl":null,"url":null,"abstract":"This paper presents the design of an energy buffer decoupling double-line-frequency AC power pulsation from main DC power sources in the single-phase series-stacked PV-battery inverter. As the active decoupling technique reducing the amount of capacitance required to stabilize the DC-bus voltage and achieving elimination of electrolytic capacitors, the series-stacked buffer architecture is adopted. In this work, the focus is on the optimization of the buffer design in the series-stacked PV-battery inverter and presenting the control scheme of the partial-power DC-DC optimizer to avoid processing the double-line-frequency AC current through all the DC sources: a PV string and a battery. The steady-state operation of the AC power pulsation decoupling of the series-stacked PV-battery inverter is demonstrated and verified through the controller hardware-in-the-loop test.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.2019.8721940","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents the design of an energy buffer decoupling double-line-frequency AC power pulsation from main DC power sources in the single-phase series-stacked PV-battery inverter. As the active decoupling technique reducing the amount of capacitance required to stabilize the DC-bus voltage and achieving elimination of electrolytic capacitors, the series-stacked buffer architecture is adopted. In this work, the focus is on the optimization of the buffer design in the series-stacked PV-battery inverter and presenting the control scheme of the partial-power DC-DC optimizer to avoid processing the double-line-frequency AC current through all the DC sources: a PV string and a battery. The steady-state operation of the AC power pulsation decoupling of the series-stacked PV-battery inverter is demonstrated and verified through the controller hardware-in-the-loop test.