Mausamjeet Khatua, Danish Shahzad, Saad Pervaiz, K. Afridi
{"title":"A High-Power-Density Electrolytic-Free Offline LED Driver Utilizing a Merged Energy Buffer Architecture","authors":"Mausamjeet Khatua, Danish Shahzad, Saad Pervaiz, K. Afridi","doi":"10.1109/APEC.2019.8722022","DOIUrl":null,"url":null,"abstract":"This paper presents a high-power-density high-efficiency single-phase electrolytic-free offline LED driver that utilizes a novel energy buffer architecture for twice-line-frequency energy buffering. The proposed LED driver comprises two stages: a front-end power factor correction stage, followed by a merged energy- buffering/dc-dc conversion stage. The proposed merged energy buffer architecture reduces the step-down voltage conversion ratio requirement of the second stage dc-dc converter, thus improving its efficiency. This buffer architecture also increases the energy utilization of the buffer capacitors, thus reducing the passive volume of the energy buffer. The PFC stage is realized using a four- switch buck-boost converter and an LLC resonant converter is used to realize the second stage dc-dc converter. A 150-W prototype LED driver utilizing the proposed merged energy buffer is designed, built and tested and the experimental results are presented. The PFC stage maintains a high power factor and achieves a peak efficiency of 97% while the LLC stage achieves a peak efficiency of 93%. The prototype LED driver achieves a power density of 50 W/inch3, while replacing electrolytic capacitors with much lower energy density ceramic capacitors.","PeriodicalId":142409,"journal":{"name":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.2019.8722022","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents a high-power-density high-efficiency single-phase electrolytic-free offline LED driver that utilizes a novel energy buffer architecture for twice-line-frequency energy buffering. The proposed LED driver comprises two stages: a front-end power factor correction stage, followed by a merged energy- buffering/dc-dc conversion stage. The proposed merged energy buffer architecture reduces the step-down voltage conversion ratio requirement of the second stage dc-dc converter, thus improving its efficiency. This buffer architecture also increases the energy utilization of the buffer capacitors, thus reducing the passive volume of the energy buffer. The PFC stage is realized using a four- switch buck-boost converter and an LLC resonant converter is used to realize the second stage dc-dc converter. A 150-W prototype LED driver utilizing the proposed merged energy buffer is designed, built and tested and the experimental results are presented. The PFC stage maintains a high power factor and achieves a peak efficiency of 97% while the LLC stage achieves a peak efficiency of 93%. The prototype LED driver achieves a power density of 50 W/inch3, while replacing electrolytic capacitors with much lower energy density ceramic capacitors.