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2008 Ph.D. Research in Microelectronics and Electronics最新文献

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An analog baseband chain for DS-UWB system 一种用于DS-UWB系统的模拟基带链
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595765
T. Koivisto, J. Maunu, E. Tiiliharju
{"title":"An analog baseband chain for DS-UWB system","authors":"T. Koivisto, J. Maunu, E. Tiiliharju","doi":"10.1109/RME.2008.4595765","DOIUrl":"https://doi.org/10.1109/RME.2008.4595765","url":null,"abstract":"In this paper, we propose a mixed-mode baseband chain using a high-speed analog Viterbi decoder. The circuit system architecture is presented with a link budget calculations and the baseband circuitry is introduced. Our target performance is 125 Mbit/s and 1 GbWs throughput at the distances of 10 and 1 m using a 1 GHz bandwidth dedicated to UWB systems between 3.1-4.9 GHz utilizing the analog Viterbi decoder. Proposed analog receiver architecture makes possible high-speed communication with decreased power consumption.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117347621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A μg resolution microacelerometer system with a second-order Σ-Δ readout circuitry 具有二阶Σ-Δ读出电路的μg分辨率微加速度计系统
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595720
R. Kepenek, I. Ocak, H. Kulah, T. Akin
{"title":"A μg resolution microacelerometer system with a second-order Σ-Δ readout circuitry","authors":"R. Kepenek, I. Ocak, H. Kulah, T. Akin","doi":"10.1109/RME.2008.4595720","DOIUrl":"https://doi.org/10.1109/RME.2008.4595720","url":null,"abstract":"This paper reports a 2nd order electromechanical sigma-delta accelerometer system. Accelerometer is fabricated using dissolved wafer process, and has a structural thickness of 15 mum. A large proof mass is used to decrease the mechanical noise of the accelerometer and 306 fingers per side are used to increase the sensitivity and operation range of the accelerometer. In order to obtain a high resolution, low noise accelerometer system, a fully differential, closed loop, oversampled sigma-delta capacitive readout circuit is designed and implemented. The chip includes a switched-capacitor charge integrator and a comparator, and can be used in either open-loop or closed-loop mode. The readout circuit has more than 115 dB dynamic range and can resolve less than 3 aF/radicHz. A digital filtration and decimation circuitry is also implemented to signal process the output bit stream of the readout circuit. The Sigma-Delta second order closed loop readout circuit consumes 16 mW power from a 5 V supply and the complete accelerometer system has a 0.3% non-linearity in plusmn1 g range 86 mug bias drift 74 mug/radicHz of noise level and maximum operation range of plusmn18.5 g.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125968371","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Analyses and design of low power clock generators for RFID TAGs RFID标签低功耗时钟发生器的分析与设计
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595755
C. Klapf, A. Missoni, W. Pribyl, G. Holweg, G. Hofer
{"title":"Analyses and design of low power clock generators for RFID TAGs","authors":"C. Klapf, A. Missoni, W. Pribyl, G. Holweg, G. Hofer","doi":"10.1109/RME.2008.4595755","DOIUrl":"https://doi.org/10.1109/RME.2008.4595755","url":null,"abstract":"This paper introduces a new clock generation concept with a PLL for HF RFID systems. Low power consumption of 1.9 muW and a good decoupling against power supply and bias variations are necessary to reach HF RFID timing and energy performance requirements. All presented oscillator topologies can be used in UHF EPCglobal class1 gen2 RFID systems as local oscillator with a minimum frequency of 1.92 MHz. For all oscillators the PSR, power consumption and temperature drift are simulated and partly measured. In the CTS1 project a new VCO and local oscillator concept was developed and manufactured on an Infineon 120 nm CMOS test-chip. The PLL is simulated with the same process technology.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115060118","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Statistical performance of IIP2 in active and passive mixers IIP2在有源和无源混频器中的统计性能
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595750
M. Voltti, T. Koivisto, E. Tiiliharju
{"title":"Statistical performance of IIP2 in active and passive mixers","authors":"M. Voltti, T. Koivisto, E. Tiiliharju","doi":"10.1109/RME.2008.4595750","DOIUrl":"https://doi.org/10.1109/RME.2008.4595750","url":null,"abstract":"In this work, we study two down conversion mixers, a passive ring mixer and an active Gilbert mixer from the point of view of even order distortion. First, the effect of mismatch on the IIP2 mean value and deviation of the mixer is studied by Monte Carlo simulations. The simulated results are compared to demands of the WCDMA standard, and the need for second order distortion compensation techniques is discussed. After this, we study how phase and amplitude errors of LO-signals affect the IM2 distortion of the mixer. The simulation results show that without an extra IIP2 compensation technique the mixers cannot meet the linearity requirements demanded by the system.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"2015 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114489294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Design of CMOS chopper amplifiers for thermal sensor interfacing 热传感器接口CMOS斩波放大器的设计
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595761
M. Dei, P. Bruschi, M. Piotto
{"title":"Design of CMOS chopper amplifiers for thermal sensor interfacing","authors":"M. Dei, P. Bruschi, M. Piotto","doi":"10.1109/RME.2008.4595761","DOIUrl":"https://doi.org/10.1109/RME.2008.4595761","url":null,"abstract":"An analytical approach to the design of compact CMOS chopper amplifiers for integrated thermoelectric sensors is presented. The impact of the high resistance and low signal bandwidth of thermopile sources on the design is illustrated. The proposed approach, regarding the precision vs noise tradeoff, is applied to the design of a practical prototype, using a commercial process. Accurate electrical simulations are provided to confirm the effectiveness of the proposed design methodology.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129493648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Robust digital image watermarking based on normalization and complex wavelet transform 基于归一化和复小波变换的鲁棒数字图像水印
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595724
C. Vural, Serap Kazan
{"title":"Robust digital image watermarking based on normalization and complex wavelet transform","authors":"C. Vural, Serap Kazan","doi":"10.1109/RME.2008.4595724","DOIUrl":"https://doi.org/10.1109/RME.2008.4595724","url":null,"abstract":"In this study, a new digital image watermarking algorithm based on moment-based image normalization and the two dimensional dual tree complex wavelet transform (2D DT-CWT) was developed. Normalization provides robustness against geometrical distortions, whereas 2D DT-CWT increases robustness for attacks such as additive noise, linear and nonlinear filtering, JPEG compression. It was accomplished that added watermark achieves both transparency and robustness requirements by taking the properties of the human visual system account.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114611687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A matching circuit tuned, multi-band (WLAN and WiMAX), Class — a power amplifier using 0.25μm-SiGe HBT technology 匹配电路调谐，多频段(WLAN和WiMAX)， A级功率放大器，采用0.25μm-SiGe HBT技术
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595752
M. Kaynak, I. Tekin, Y. Gurbuz
{"title":"A matching circuit tuned, multi-band (WLAN and WiMAX), Class — a power amplifier using 0.25μm-SiGe HBT technology","authors":"M. Kaynak, I. Tekin, Y. Gurbuz","doi":"10.1109/RME.2008.4595752","DOIUrl":"https://doi.org/10.1109/RME.2008.4595752","url":null,"abstract":"In this work, a MOS based output matching network is designed and fabricated using IHP (innovations for high performance), 0.25 mum-SiGe HBT process and measured which can give 4 different impedance values. Also, a multi-band, Class-A, power amplifier (PA) has been designed with same technology and the desired output impedances for matching network are taken from the load-pull simulation results of this PA. The behavior of the amplifier has been optimized for 2.4 GHz (WLAN), 3.6 GHz (UWB-WiMAX) and 5.4 GHz (WLAN) frequency bands for high output power. Multi-band characteristic of the amplifier was obtained by using MOS based switching network. Two MOS switches are used for changing the behavior of the matching network and 4 possible states are achieved. Post-Layout simulation results of the PA circuit provided the following performance parameters: output power of 28-dBm, gain value of 26-dB and efficiency value of %19 for the 2.4 GHz WLAN band, output power of 28-dBm, gain value of 22-dB and efficiency value of %20 for the 3.6 GHz UWB-WiMAX band, and output power of 27-dBm, gain value of 23-dB and efficiency value of %17 for the 5.4 GHz WLAN band.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126409952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
LED integrated miniaturized polymer MEMS display LED集成微型化聚合物MEMS显示屏
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595733
Y. D. Gokdel, B. Sarıoǧlu, A. Yalçinkaya
{"title":"LED integrated miniaturized polymer MEMS display","authors":"Y. D. Gokdel, B. Sarıoǧlu, A. Yalçinkaya","doi":"10.1109/RME.2008.4595733","DOIUrl":"https://doi.org/10.1109/RME.2008.4595733","url":null,"abstract":"This study presents the process development and first experimental results of LED integrated polymer microelectromechanical systems (MEMS) for two-dimensional displays. Proposed integrated system is very cheap due to the fabrication simplicity and the choice of polymer material as the structural layer, and it is a strong candidate to show similar performance when compared with the existing flat panel displays. A process technology that enables the integration of the LED dies and the PCB-based MEMS structure is presented. The very first version of the MEMS structure is actuated by consuming 11.5 mW and resulting displacement is measured to be 9 mm. Along with the LED die size of 250 mum times 250 mum, 36 pixels of resolution can be achieved.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129618872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 24 GHz, 18 dBm fully integrated power amplifier in a 0.13μm SiGe HBT technology 采用0.13μm SiGe HBT技术的24ghz, 18dbm全集成功率放大器
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595756
N. Demirel, E. Kerhervé, D. Pache, R. Plana
{"title":"A 24 GHz, 18 dBm fully integrated power amplifier in a 0.13μm SiGe HBT technology","authors":"N. Demirel, E. Kerhervé, D. Pache, R. Plana","doi":"10.1109/RME.2008.4595756","DOIUrl":"https://doi.org/10.1109/RME.2008.4595756","url":null,"abstract":"A 24 GHz, +18.0 dBm fully-integrated power amplifier (PA) with 50 Omega input and output matching is designed in 0.13 mum SiGe BiCMOS process. The power amplifier features a peak power gain of 7.8 dB with 15.89 dBm output power at 1 dB compression and a maximum single-ended output power of +18.0 dBm with 25.9% of power-added efficiency (PAE). The power amplifier uses a single 1.8 V supply and was fully integrated (including matching elements and bias circuit). The matching networks use inductors and MIM capacitors for high integration purpose, the circuit occupies a small area of 0.3 mm2 (including pads and matching networks).","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130013758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An evaluation methodology for the security of cryptosystems 密码系统安全性的评估方法
2008 Ph.D. Research in Microelectronics and Electronics Pub Date : 2008-08-12 DOI: 10.1109/RME.2008.4595738
Selma Laabidi, B. Robisson, M. Agoyan
{"title":"An evaluation methodology for the security of cryptosystems","authors":"Selma Laabidi, B. Robisson, M. Agoyan","doi":"10.1109/RME.2008.4595738","DOIUrl":"https://doi.org/10.1109/RME.2008.4595738","url":null,"abstract":"This paper describes an integrated circuit design methodology which evaluates at the gate level the resistance of the circuit to a class of attacks, among them is the well-known Differential Power Analysis (DPA). This is of particular concern since it enables the designer to detect design strengths and weaknesses and to compare and choose different circuitpsilas architectures at an early stage of the design flow. The proposed methodology has been applied to different hardware models of the Advanced Encryption Standard (AES) and highlights substantial differences between the models in terms of area and security.","PeriodicalId":140550,"journal":{"name":"2008 Ph.D. Research in Microelectronics and Electronics","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133215939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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