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2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)最新文献

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Analysis of self discharge characteristics of electric double layer capacitors 双层电电容器自放电特性分析
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259864
M. Pantazica, A. Drumea, C. Marghescu
{"title":"Analysis of self discharge characteristics of electric double layer capacitors","authors":"M. Pantazica, A. Drumea, C. Marghescu","doi":"10.1109/SIITME.2017.8259864","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259864","url":null,"abstract":"Electric Double Layer Capacitors (EDLC) represent a viable choice for energy storage in low power energy harvesting applications where primary energy varies in time or even is missing for periods of time. A major drawback of these devices is their self-discharge, especially in cases like solar panels, where no energy is supplied in EDLC for hours during the night. The present paper presents a Spice model of EDLC with self discharge behavior, a designed and implemented test bench for the study of self discharge of EDLC devices and some measurements performed with it as well as the adjustment of Spice model to meet the measured parameters of different types of EDLC devices.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125212235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Scheduling of printed circuit board production with mathematical solvers 印刷电路板生产调度的数学求解
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259868
G.Á. Farkas, P. Martinek
{"title":"Scheduling of printed circuit board production with mathematical solvers","authors":"G.Á. Farkas, P. Martinek","doi":"10.1109/SIITME.2017.8259868","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259868","url":null,"abstract":"This paper introduces a new approach which supports product plan optimization for PCB manufacturing. The scheduling of the PCB manufacturing line is modelled by the flow-shop scheduling problem in our method. The basic aim is to shorten the computational time of the optimization while getting a lower value for the overall makespan. Three different methods are proposed in this paper, which are based on the different initialization of the optimization algorithm. The first contains a heuristic approximation technique pre-optimizing the input data. A starting schedule is provided with a constructive and quick method (i.e. DR (dispatching rule)), before starting the calculation of the actual scheduling. In the next case we focus on tuning the optimization algorithm. Different abilities like search control of the IBM ILOG CPLEX Optimization Studio's FDS (Failure-Directed Search) algorithm were examined. Former, valid production plans are used for re-initializing the algorithm run to shorten the required computational time during optimization in another approach described in the paper in details.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117261837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A comparative simulation analysis of toroid and planar magnetic cores near MHz region 环形磁芯与平面磁芯在MHz附近的对比仿真分析
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259903
Constantin Ropoteanu, P. Svasta, C. Ionescu
{"title":"A comparative simulation analysis of toroid and planar magnetic cores near MHz region","authors":"Constantin Ropoteanu, P. Svasta, C. Ionescu","doi":"10.1109/SIITME.2017.8259903","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259903","url":null,"abstract":"Power supplies using high frequency magnetic materials, due to the continuous materials improvements near the MHz region, led for developing high density power supply applications. In this context, power distribution in systems that combine both power and signal PCB layout must be taken care of considering design constraints. Nevertheless, the use of either toroid or planar transformer in a high density PCB systems may amount to optimal power requirements. This article provides a comparative simulation study of the toroidal and EI magnetic cores considering that both models have the same material specifications (3F4). Although it is known that the toroid geometry leads to low flux losses it is of interest to determine the magnitude of emissions and how complex becomes maintaining the integrity of the signal lines in the vicinity of the core. Two models have been analyzed, first representing a TX36 toroid and the second one a model used in a previous work.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125671222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Instrument clusters for monitoring electric vehicles 用于监控电动汽车的仪表组
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259931
L. Perisoara, D. Săcăleanu, A. Vasile
{"title":"Instrument clusters for monitoring electric vehicles","authors":"L. Perisoara, D. Săcăleanu, A. Vasile","doi":"10.1109/SIITME.2017.8259931","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259931","url":null,"abstract":"In this paper, we present a basic testing platform for Electric Vehicles (EVs) containing a HPEVS AC-50 electric motor, a Curtis 1238-7601 controller, 30 LiFePO4 batteries, chargers and a Battery Management System (BMS). To monitor different parameters of interest (motor speed, current, battery pack voltage, motor and controller temperatures, state of charge) we have developed two different interfaces which can be used as instrument clusters. The first interface is based on Arduino Uno and it has a 20×4 Liquid Cristal Display (LCD). The second interface is a Virtual Instrument (VI) cluster developed in LabVIEW. Both interfaces communicate with the EV testing platform components through the serial or CAN buses.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114684037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Package parasitics analysis for input / output digital ports 输入/输出数字端口的封装寄生分析
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/siitme.2017.8259890
P. Balan, P. Svasta, R. Constantinescu
{"title":"Package parasitics analysis for input / output digital ports","authors":"P. Balan, P. Svasta, R. Constantinescu","doi":"10.1109/siitme.2017.8259890","DOIUrl":"https://doi.org/10.1109/siitme.2017.8259890","url":null,"abstract":"Latest steps in evolution that we are seeing in high speed digital devices are quite remarkable. As signal speed of these devices rise, all elements along signal pathway need to be taken into account during design stage. The materials used to build the devices mentioned have certain properties that are useful and some other properties that may produce undesired effects, including signal distortion. This paper is focused on simulation and analysis of parasitic elements inside microcontrollers input and output ports that may influence signal integrity at high speeds.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"11159 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132514589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Transparent USB splitter for input devices 用于输入设备的透明USB分配器
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259914
Ana-Maria Ciolan, F. Henze
{"title":"Transparent USB splitter for input devices","authors":"Ana-Maria Ciolan, F. Henze","doi":"10.1109/SIITME.2017.8259914","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259914","url":null,"abstract":"This paper presents a system whose purpose is to distribute input data from a single source to two outputs. This device acts as an inverse USB hub because it distributes information from a single data source to multiple end-devices. The Universal Serial Bus specifications do not make any provisions for multicast data distribution. The advantage of the system consists in simplifying the transmission process by decreasing the number of devices used in distribution and thus reducing the potential for errors as well as gaining valuable production time by parallelizing an otherwise sequential process. The purpose is to reduce the number of barcode scanners needed to input one product into multiple systems. Considering the fact that almost every scanner works in Human Interface Device mode, the system can be tested using a regular keyboard. The input should appear duplicated on each connected PC. The device will have an USB type A input and two USB type B outputs. The project consists of building and configuring such a splitting device.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131076462","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A wide range fine tuning capacitance multiplier 宽范围微调电容倍增器
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259873
G. Bonteanu
{"title":"A wide range fine tuning capacitance multiplier","authors":"G. Bonteanu","doi":"10.1109/SIITME.2017.8259873","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259873","url":null,"abstract":"A new circuit solution for capacitance multiplication that allows a wide range fine tuning is proposed. The basic idea of the circuit is to control a capacitor current multiplication with a strongly unbalance induced into a VGS loop of a current mirror. For the tuning a DC current is injected into a resistor to create that unbalance. The inherent DC component of the output current is rejected using a replica circuit.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133387518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Low cost lock-in amplifier solutions 低成本锁相放大器解决方案
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259871
R. Belea, S. Epure
{"title":"Low cost lock-in amplifier solutions","authors":"R. Belea, S. Epure","doi":"10.1109/SIITME.2017.8259871","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259871","url":null,"abstract":"The analog part of the lock-in amplifier consists in three units: the measuring channel, the synchronization channel and one or two PSD (phase sensitive detector) circuits. For low frequency applications, the PSD circuit can be build with ordinary operational amplifiers and CMOS multiplexers. The paper presents a study of the proposed PSD circuit and two examples: a conditioner for the LVDT (linear variable differential transformer) sensor, and an device which together with a laboratory DDT (direct digital synthesis) signal generator can measure the gain-frequency and phase-frequency diagrams (Bode diagrams) of an electric circuit.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134037201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Thermal via placement for high-power applications 热通过放置高功率应用
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259895
A. Fodor, R. Jano, G. Chindris, D. Pitica
{"title":"Thermal via placement for high-power applications","authors":"A. Fodor, R. Jano, G. Chindris, D. Pitica","doi":"10.1109/SIITME.2017.8259895","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259895","url":null,"abstract":"Thermal management in electronics continues to be one of the most important fields which can take part in ensuring the reliability of an electronic system. Heat transfer, from a system to the ambient, must be optimized, and even a temperature with 1°C less can have an effect in prolonging the life of an electronic component. The research presented in this paper aims to decrease the junction temperature of a power device, by optimizing the placement of thermal vias underneath the IC. Various thermal vias placement scenarios are analyzed and their benefit in improving the thermal dissipation from a component to the PCB and ambient is discussed.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114305233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Indoor positioning WLAN based fingerprinting as supervised machine learning problem 基于WLAN的室内定位指纹识别监督机器学习问题
2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI: 10.1109/SIITME.2017.8259888
D. Năstac, Florentin Alexandru Iftimie, O. Arsene, Virgil Ilian, B. Cramariuc
{"title":"Indoor positioning WLAN based fingerprinting as supervised machine learning problem","authors":"D. Năstac, Florentin Alexandru Iftimie, O. Arsene, Virgil Ilian, B. Cramariuc","doi":"10.1109/SIITME.2017.8259888","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259888","url":null,"abstract":"Indoor positioning is one of the major topics in today's navigation and positioning research fields which is partially solved. The research community has not converged to a single, widely accepted solution that can achieve the desired accuracy at the required cost. Wireless Local Area Network (WLAN) based fingerprinting using Received Signal Strengths (RSS) is been considered as one solution for indoor positioning. This study structures this approach as supervised machine learning problem type where the target variable is the position and the features are the RSS values. There are compared the results obtained by from two analysis perspectives, regression and classification.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114689765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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