{"title":"Scheduling of printed circuit board production with mathematical solvers","authors":"G.Á. Farkas, P. Martinek","doi":"10.1109/SIITME.2017.8259868","DOIUrl":null,"url":null,"abstract":"This paper introduces a new approach which supports product plan optimization for PCB manufacturing. The scheduling of the PCB manufacturing line is modelled by the flow-shop scheduling problem in our method. The basic aim is to shorten the computational time of the optimization while getting a lower value for the overall makespan. Three different methods are proposed in this paper, which are based on the different initialization of the optimization algorithm. The first contains a heuristic approximation technique pre-optimizing the input data. A starting schedule is provided with a constructive and quick method (i.e. DR (dispatching rule)), before starting the calculation of the actual scheduling. In the next case we focus on tuning the optimization algorithm. Different abilities like search control of the IBM ILOG CPLEX Optimization Studio's FDS (Failure-Directed Search) algorithm were examined. Former, valid production plans are used for re-initializing the algorithm run to shorten the required computational time during optimization in another approach described in the paper in details.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIITME.2017.8259868","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper introduces a new approach which supports product plan optimization for PCB manufacturing. The scheduling of the PCB manufacturing line is modelled by the flow-shop scheduling problem in our method. The basic aim is to shorten the computational time of the optimization while getting a lower value for the overall makespan. Three different methods are proposed in this paper, which are based on the different initialization of the optimization algorithm. The first contains a heuristic approximation technique pre-optimizing the input data. A starting schedule is provided with a constructive and quick method (i.e. DR (dispatching rule)), before starting the calculation of the actual scheduling. In the next case we focus on tuning the optimization algorithm. Different abilities like search control of the IBM ILOG CPLEX Optimization Studio's FDS (Failure-Directed Search) algorithm were examined. Former, valid production plans are used for re-initializing the algorithm run to shorten the required computational time during optimization in another approach described in the paper in details.