{"title":"宽范围微调电容倍增器","authors":"G. Bonteanu","doi":"10.1109/SIITME.2017.8259873","DOIUrl":null,"url":null,"abstract":"A new circuit solution for capacitance multiplication that allows a wide range fine tuning is proposed. The basic idea of the circuit is to control a capacitor current multiplication with a strongly unbalance induced into a VGS loop of a current mirror. For the tuning a DC current is injected into a resistor to create that unbalance. The inherent DC component of the output current is rejected using a replica circuit.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A wide range fine tuning capacitance multiplier\",\"authors\":\"G. Bonteanu\",\"doi\":\"10.1109/SIITME.2017.8259873\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new circuit solution for capacitance multiplication that allows a wide range fine tuning is proposed. The basic idea of the circuit is to control a capacitor current multiplication with a strongly unbalance induced into a VGS loop of a current mirror. For the tuning a DC current is injected into a resistor to create that unbalance. The inherent DC component of the output current is rejected using a replica circuit.\",\"PeriodicalId\":138347,\"journal\":{\"name\":\"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIITME.2017.8259873\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIITME.2017.8259873","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new circuit solution for capacitance multiplication that allows a wide range fine tuning is proposed. The basic idea of the circuit is to control a capacitor current multiplication with a strongly unbalance induced into a VGS loop of a current mirror. For the tuning a DC current is injected into a resistor to create that unbalance. The inherent DC component of the output current is rejected using a replica circuit.