输入/输出数字端口的封装寄生分析

2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2017-10-01 DOI:10.1109/siitme.2017.8259890

P. Balan, P. Svasta, R. Constantinescu

{"title":"输入/输出数字端口的封装寄生分析","authors":"P. Balan, P. Svasta, R. Constantinescu","doi":"10.1109/siitme.2017.8259890","DOIUrl":null,"url":null,"abstract":"Latest steps in evolution that we are seeing in high speed digital devices are quite remarkable. As signal speed of these devices rise, all elements along signal pathway need to be taken into account during design stage. The materials used to build the devices mentioned have certain properties that are useful and some other properties that may produce undesired effects, including signal distortion. This paper is focused on simulation and analysis of parasitic elements inside microcontrollers input and output ports that may influence signal integrity at high speeds.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"11159 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Package parasitics analysis for input / output digital ports\",\"authors\":\"P. Balan, P. Svasta, R. Constantinescu\",\"doi\":\"10.1109/siitme.2017.8259890\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Latest steps in evolution that we are seeing in high speed digital devices are quite remarkable. As signal speed of these devices rise, all elements along signal pathway need to be taken into account during design stage. The materials used to build the devices mentioned have certain properties that are useful and some other properties that may produce undesired effects, including signal distortion. This paper is focused on simulation and analysis of parasitic elements inside microcontrollers input and output ports that may influence signal integrity at high speeds.\",\"PeriodicalId\":138347,\"journal\":{\"name\":\"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)\",\"volume\":\"11159 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/siitme.2017.8259890\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/siitme.2017.8259890","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

我们在高速数字设备上看到的最新进化步骤是相当引人注目的。随着这些器件信号速度的提高，在设计阶段需要考虑信号通路上的所有元件。用于构建上述设备的材料具有某些有用的特性和一些可能产生不良影响的其他特性，包括信号失真。本文着重于模拟和分析微控制器输入和输出端口内可能影响高速信号完整性的寄生元件。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Package parasitics analysis for input / output digital ports

Latest steps in evolution that we are seeing in high speed digital devices are quite remarkable. As signal speed of these devices rise, all elements along signal pathway need to be taken into account during design stage. The materials used to build the devices mentioned have certain properties that are useful and some other properties that may produce undesired effects, including signal distortion. This paper is focused on simulation and analysis of parasitic elements inside microcontrollers input and output ports that may influence signal integrity at high speeds.

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来源期刊

2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)

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