2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)最新文献_第7页

A 2.4-GHz 18-mW Two-Point Delta-Sigma Modulation Transmitter for IEEE 802.15.4 用于IEEE 802.15.4的2.4 ghz 18mw两点Delta-Sigma调制发射机

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2007-04-25 DOI: 10.1109/VDAT.2007.373241

Ching-Lung Ti, Tsung-Hsien Lin

引用次数: 3

The novel Chinese abacus adder 新颖的中国算盘加法器

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2007-04-25 DOI: 10.1109/VDAT.2007.372759

Zi-Yi Zhao, Chien-Hung Lin, Yu-Zhi Xie, Yen-Ju Chen, Yi-Jie Lin, Shu-Chung Yi

引用次数: 9

On-Chip Transmission Line Modeling and Applications to Millimeter-Wave Circuit Design in 0.13um CMOS Technology 片上传输线建模及其在0.13um CMOS毫米波电路设计中的应用

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2007-04-25 DOI: 10.1109/VDAT.2007.373243

Chun-Lin Ko, C. Kuo, Y. Juang

{"title":"On-Chip Transmission Line Modeling and Applications to Millimeter-Wave Circuit Design in 0.13um CMOS Technology","authors":"Chun-Lin Ko, C. Kuo, Y. Juang","doi":"10.1109/VDAT.2007.373243","DOIUrl":"https://doi.org/10.1109/VDAT.2007.373243","url":null,"abstract":"This paper presents the on-chip transmission line modeling and applications to circuit design at millimeter-wave (ram-wave) frequencies. The microstrip model of circuit simulators benefits in fast calculations of the characteristics of microstrip lines. As the structure of on-chip microstrip differs from the modeled structure, two key parameters of the microstrip model need to be modified for the different electromagnetic (EM) behavior according to the measured microstrip line. With proper parameters, the traditional transmission line model is able to accurately predict the real characteristic of on-chip microstrip lines without time-consuming EM simulation. A mm-wave microstrip line filter and a single-stage cascode low noise amplifier (LNA) are fabricated to verify the model. All passive components for input/output matching networks and bias networks are on-chip. The LNA takes the supply voltage and dc current of 1.4 V and 10 mA, respectively. A gain of 3.8 dB and an input/output return loss of 8.5/7.0 dB are measured at 60.3 GHz. The simulation results in both circuits are in good agreement with measured data.","PeriodicalId":137915,"journal":{"name":"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123604880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 17

Low-Power Instruction Cache Architecture Using Pre-Tag Checking 使用预标记检查的低功耗指令缓存架构

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2007-04-25 DOI: 10.1109/VDAT.2007.373216

S. Cheng, Juinn-Dar Huang

引用次数: 1

Challenges of Digital Consumer and Mobile SoC's: More Moore Possible? 数字消费和移动SoC的挑战:更多摩尔的可能性?

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2007-04-16 DOI: 10.1109/DATE.2007.364556

T. Furuyama

引用次数: 8

λ-geometry clock tree construction with wirelength and via minimization λ几何时钟树结构与无线和通过最小化

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2007-04-01 DOI: 10.1109/VDAT.2007.373226

Chun-Hao Wang, Wai-Kei Mak

引用次数: 8

Nanoelectronics: challenges and opportunities 纳米电子学:挑战与机遇

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2006-09-13 DOI: 10.1007/11847083_64

G. Micheli

引用次数: 4

A 30Phase 500MHz PLL for 3X Over-Sampling Clock Data Recovery 用于3倍过采样时钟数据恢复的30相位500MHz锁相环

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2006-06-22 DOI: 10.1109/VDAT.2007.373236

Kuo-Hsing Cheng, Chao-An Chen, Wei-Bin Yang, Feng-Hsin Cho

引用次数: 1

A 6Gbps Serial Link Transmitter with Pre-emphasis 一个6Gbps串行链路发射机与预强调

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 2003-01-21 DOI: 10.1145/1119772.1119948

Chih-Hsien Lin, Chung-Hong Wang, S. Jou

引用次数: 15

Challenges and Solutions in Modern VLSI Placement 现代VLSI封装的挑战与解决方案

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) Pub Date : 1900-01-01 DOI: 10.1109/vdat.2007.373223

Zhe-Wei Jiang, Hsin-Chen Chen, Tung-Chieh Chen, Yao-Wen Chang

引用次数: 9