{"title":"新颖的中国算盘加法器","authors":"Zi-Yi Zhao, Chien-Hung Lin, Yu-Zhi Xie, Yen-Ju Chen, Yi-Jie Lin, Shu-Chung Yi","doi":"10.1109/VDAT.2007.372759","DOIUrl":null,"url":null,"abstract":"A novel Chinese abacus adder is presented in this paper. The simulation results of 8-bit adders are compared with those of CLA (carry look-ahead) adder and RCA (ripple carry adder) by all input patterns. The delay of the 8-bit abacus adder is 22%, and 14% less than those of CLA adders for 0.35mum and 0.18mum technologies, respectively. The power consumption of the abacus adders are 30% and 60% less than those of CLA adders for 0.35mum, and 0.18mum technologies, respectively. The delay of the 32-bit abacus adder is 17%, and 12% less than those of CLA adder for 0.35mum, and 0.18mum technologies, respectively.","PeriodicalId":137915,"journal":{"name":"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"The novel Chinese abacus adder\",\"authors\":\"Zi-Yi Zhao, Chien-Hung Lin, Yu-Zhi Xie, Yen-Ju Chen, Yi-Jie Lin, Shu-Chung Yi\",\"doi\":\"10.1109/VDAT.2007.372759\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel Chinese abacus adder is presented in this paper. The simulation results of 8-bit adders are compared with those of CLA (carry look-ahead) adder and RCA (ripple carry adder) by all input patterns. The delay of the 8-bit abacus adder is 22%, and 14% less than those of CLA adders for 0.35mum and 0.18mum technologies, respectively. The power consumption of the abacus adders are 30% and 60% less than those of CLA adders for 0.35mum, and 0.18mum technologies, respectively. The delay of the 32-bit abacus adder is 17%, and 12% less than those of CLA adder for 0.35mum, and 0.18mum technologies, respectively.\",\"PeriodicalId\":137915,\"journal\":{\"name\":\"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-04-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2007.372759\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2007.372759","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel Chinese abacus adder is presented in this paper. The simulation results of 8-bit adders are compared with those of CLA (carry look-ahead) adder and RCA (ripple carry adder) by all input patterns. The delay of the 8-bit abacus adder is 22%, and 14% less than those of CLA adders for 0.35mum and 0.18mum technologies, respectively. The power consumption of the abacus adders are 30% and 60% less than those of CLA adders for 0.35mum, and 0.18mum technologies, respectively. The delay of the 32-bit abacus adder is 17%, and 12% less than those of CLA adder for 0.35mum, and 0.18mum technologies, respectively.
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