Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03最新文献

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Developing a teaching environment for rapid design and verification of complex digital/computing systems 开发一个教学环境,快速设计和验证复杂的数字/计算系统
Donald Hung, John Vien, Wendy Chan, Chi-wei Fu
{"title":"Developing a teaching environment for rapid design and verification of complex digital/computing systems","authors":"Donald Hung, John Vien, Wendy Chan, Chi-wei Fu","doi":"10.1109/MSE.2003.1205287","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205287","url":null,"abstract":"This paper first discusses the need and difficulties for the education community to establish an environment to teach system-level design and verification, then describes the activities at San Jose State University (Computer Engineering Department) in developing such an environment through a low cost approach. A demo is provided along with the paper.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116998447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A DOT1 & DOT4 MOSIS-compatible library 一个DOT1和DOT4 mosis兼容库
A. Rucinski, B. Stetson, S. T. P. Brundavani
{"title":"A DOT1 & DOT4 MOSIS-compatible library","authors":"A. Rucinski, B. Stetson, S. T. P. Brundavani","doi":"10.1109/MSE.2003.1205265","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205265","url":null,"abstract":"There exists a lack of balance between design and testing topics in microelectronic curricula. However, boundary scan as a virtual probe presents an opportunity to teach testing and design for testability in such a curriculum. This effort is facilitated by the use of IEEE standards, universal acceptance in industry, and the availability of low cost test equipment. This paper introduces a library of boundary scan components based on the IEEE standards. The library is being verified using the AMI 0.5 micron 40 pin Tiny Chip VLSI device fabricated through MOSIS services.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"219 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122362028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Overcoming the limitations of traditional media for teaching modern processor design 克服传统媒体对现代处理器设计教学的局限
P. Marwedel, B. Sirocic
{"title":"Overcoming the limitations of traditional media for teaching modern processor design","authors":"P. Marwedel, B. Sirocic","doi":"10.1109/MSE.2003.1205274","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205274","url":null,"abstract":"Understanding modern processors requires a good knowledge of the dynamic behavior of processors. Traditional media like books can be used for describing the dynamic be behaviour of processors. Visualization of this behavior, however, is impossible, due to the static nature of books. In this paper, we describe a Java-based tool for visualizing the dynamic behavior of hardware structures, called RaVi (abbreviation for the German equivalent of \"computer architecture visualization\"). Available RaVi components include models of a microcoded MIPS architecture, of a MIPS pipeline, of scoreboarding, Tomasulo's algorithm and the MESI multiprocessor cache protocol. These models were found to be more useful than general simulators in classroom use. The Java-based design also enables Internet-based distance learning.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129952149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Embedded system design: UCR's undergraduate three-course sequence 嵌入式系统设计:UCR本科三门课程
F. Vahid
{"title":"Embedded system design: UCR's undergraduate three-course sequence","authors":"F. Vahid","doi":"10.1109/MSE.2003.1205260","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205260","url":null,"abstract":"We describe a three-course upper-division undergraduate sequence at the University of California, Riverside that teaches both the principles and the practice of embedded system design. While many courses teach embedded systems programming, typically at the assembly language level, few teach the principles of the field-especially with respect to hardware and software codesign. The courses have been under development since 1994 and have been quite stable for several years. The courses are based on a new textbook that emphasizes a unified views of hardware and software. All three courses include both lectures and an extensive lab component. Feedback from students who have graduated and work in the embedded systems field has been excellent.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124677944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Combining mentor graphics' HDL designer FPGA flow with a reconfigurable system on a programmable chip, educational opportunity or insanity? 将mentor graphics的HDL设计FPGA流程与可编程芯片上的可重构系统相结合,是教育机会还是疯狂?
R. Hoare, S. Tung
{"title":"Combining mentor graphics' HDL designer FPGA flow with a reconfigurable system on a programmable chip, educational opportunity or insanity?","authors":"R. Hoare, S. Tung","doi":"10.1109/MSE.2003.1205286","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205286","url":null,"abstract":"Advances in FPGA technology and in design automation tools have changed the way digital electronics are created. Shematic entry of gates is becoming deprecated by hardware description languages (HDLs) and sophisticated synthesis tools. This requires that the designer have a complete understanding of the entire design flow so that they can utilize the efficiency of HDLs while thinking about the hardware that will be created. This paper reviews three years worth of experience in teaching a two-semester senior/graduate course sequence on Hardware Design Methodologies using the Mentor Graphic's HDL Designer series tools and targeting FPGAs. Currently, all project use an ARM-embedded FPGA as their target. Given the complexity of these new devices, the tools, and only two semesters, we discuss the potential, the limitations/difficulties and the general sanity of this approach.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127746284","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Manpower development in VLSI ni India: a case study 印度超大规模集成电路的人力资源开发:一个案例研究
K. Shet
{"title":"Manpower development in VLSI ni India: a case study","authors":"K. Shet","doi":"10.1109/MSE.2003.1205240","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205240","url":null,"abstract":"In this paper a review of development of manpower in VLSI in India is attempted. In the last decade of the 20/sup th/ Century, rapid strides have been done in Micro-Electronics in India. Both private and public institutions have accelerated the growth of VLSI, Chip design and embedded systems including DSP.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126477928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
APHYDS: the Academic Physical Design Skeleton 学术物理设计框架
S. Hauck
{"title":"APHYDS: the Academic Physical Design Skeleton","authors":"S. Hauck","doi":"10.1109/MSE.2003.1205230","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205230","url":null,"abstract":"Physical Design is a complex CAD topic, which is difficult to teach to electrical and computer engineers. I have developed a complete skeleton for teaching basic algorithms such as Fiduccia-Mattheyses partitioning, variable node size sliceable floorplanning, simulated annealing placement, maze router based global routing, and left-edge algorithm channel routing. The Java-based toolset is portable, flexible, and provides a powerful interactive graphics interface.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130462535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Integrating digital, analog, and mixed-signal design in an undergraduate ECE curriculum 在本科ECE课程中整合数字、模拟和混合信号设计
J. Nestor, D. Rich
{"title":"Integrating digital, analog, and mixed-signal design in an undergraduate ECE curriculum","authors":"J. Nestor, D. Rich","doi":"10.1109/MSE.2003.1205268","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205268","url":null,"abstract":"This paper describes the integration of analog, digital, and mixed-signal IC design in the undergraduate ECE curriculum at Lafayette College. This integration is being accomplished by adding IC design coverage to the required electronics sequence and including analog and mixed-signal coverage in a what was previously an \"all-digital\" VLSI Design elective. As a result, all ECE students at Lafayette receive some basic instruction on IC design, including layout. Students who take advanced courses receive more coverage of analog and mixed-signal design.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132848615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Competence-based EE-learning: (how) can we implement it? 基于能力的电子商务学习:(我们如何)实施它?
T. Mouthaan, W. Olthuis, H. Vos
{"title":"Competence-based EE-learning: (how) can we implement it?","authors":"T. Mouthaan, W. Olthuis, H. Vos","doi":"10.1109/MSE.2003.1205242","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205242","url":null,"abstract":"There is an enhanced focus the last few years on defining competence-based curricula rather than knowledge based curricula for engineering programs. This drive stems from competence based Human Resource Management where competencies are considered key success factors rather than acquired knowledge and skills alone. Defining learning goals in terms of (tangible) competencies requires some thought but is manageable. Converting these goals to competency-directed education and testing is quite a challenge and almost automatically degrades to easy approachable competencies like 'presentation skills' and avoids the more difficult ones like 'independent learning' or 'design methodology'. In this paper we try to connect also the more difficult competencies or success factors to explicit reflection in project work as a step towards explicit training along the lines of competencies. The first results and appreciation by students are presented. In conclusion, there is still along way to go, but indications are that this is a right track.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"169 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117152484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A two-semester project-based mixed-signal IC design course using commercial EDA tools-from design to chip evaluation 这是一个两学期的基于项目的混合信号IC设计课程,使用商业EDA工具-从设计到芯片评估
Y. Xu
{"title":"A two-semester project-based mixed-signal IC design course using commercial EDA tools-from design to chip evaluation","authors":"Y. Xu","doi":"10.1109/MSE.2003.1205238","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205238","url":null,"abstract":"An increasing demand on qualified IC designers requires engineering schools to train more graduates with specialty in IC design. These newly trained graduates should not only have strong fundamentals, but also good analytical and practical skills. They should be able to quickly adapt to the commercial environment and require minimum training when hired by the design firms. A two-semester project-based mixed-signal IC design course using professional EDA tools is introduced and aimed to equip the students with both theoretical knowledge and practical skills. The course allows students to go through a mixed-signal IC prototyping cycle from design to chip evaluation.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114300821","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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