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Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03最新文献

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Comparative study on verilog-based and C-based hardware design education 基于verilog和c语言的硬件设计教学比较研究
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205246
T. Ishihara, S. Komatsu, M. Ikeda, M. Fujita, K. Asada
{"title":"Comparative study on verilog-based and C-based hardware design education","authors":"T. Ishihara, S. Komatsu, M. Ikeda, M. Fujita, K. Asada","doi":"10.1109/MSE.2003.1205246","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205246","url":null,"abstract":"As the complexity of hardware functionality continues to increase, higher abstraction level design methodology becomesmuch more important. To meet this trend, we have startedan exercise class to teach HDL-based hardware design, in1999, and modified curriculum to teach C-language-basedhardware design, in 2002. We have experiences on teachingboth HDL-based and C-based hardware design methodology.In this paper we summarize experiences encountered fromteaching both HDL-based and C-based design method, theobjective of the C-based design exercise class, and syllabusof both HDL-based and C-based exercise classes.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133231312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A proposed modeling environment to teach performance modeling and hardware/software codesign to senior undergraduates 一个建议的建模环境，以教性能建模和硬件/软件协同设计的高年级本科生
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205239
R. Klenke, J. Aylor
{"title":"A proposed modeling environment to teach performance modeling and hardware/software codesign to senior undergraduates","authors":"R. Klenke, J. Aylor","doi":"10.1109/MSE.2003.1205239","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205239","url":null,"abstract":"This paper describes a proposed modeling and design environment for teaching the concepts of performance modeling of hardware/software systems to senior computer engineering undergraduate students. This environment is being developed to support senior capstone design projects in computer engineering. Portions of this environment are currently being beta tested and educational material, including lecture slides and laboratory exercises, based on the use of the environment are being developed.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133951055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
From bits to chips: a multidisciplinary curriculum for microelectronics system design education 从比特到芯片:微电子系统设计教育的多学科课程
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205271
G. Bernstein, J. Brockman, P. Kogge, G. Snider, B. Walvoord
{"title":"From bits to chips: a multidisciplinary curriculum for microelectronics system design education","authors":"G. Bernstein, J. Brockman, P. Kogge, G. Snider, B. Walvoord","doi":"10.1109/MSE.2003.1205271","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205271","url":null,"abstract":"We describe a program in multidisciplinary education of microelectronics systems design at the University of Notre Dame. In the \"Bits-to-Chips\" course sequence, faculty from the Electrical Engineering and Computer Science and Engineering Departments, and the Kaneb Center for Teaching and Learning have coordinated their related courses and teaching methods, and team-teach a course on advanced technologies and systems-on-a-chip (SOC). Projects in the capstone course have involved the design and fabrication, completely by the students, of CMOS circuits with 10,000 transistors, and are now developing projects with roughly 50,000 devices. A recent project is an accelerometer control chip for insertion into a model rocket launch. Projects are also submitted to MOSIS for comparison with the students' efforts.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"190 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117334545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A visual simulation tool at layout level 在布局层次上的可视化仿真工具
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205278
Alexandre Casacurta, Marcel Furtado Almeida, R. Reis
{"title":"A visual simulation tool at layout level","authors":"Alexandre Casacurta, Marcel Furtado Almeida, R. Reis","doi":"10.1109/MSE.2003.1205278","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205278","url":null,"abstract":"This paper presents a Web-based graphical tool that makes it possible to view and simulate a working circuit at the layout level. This tool allows one to observe changes in logical levels with a dynamic alteration of the color properties of the graphical elements that characterize the circuit at layout level. The layout view changes colors in function of logic level changes. Two aspects of the circuit simulation are presented: taking into account the gates delay or not.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"27 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123387807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Embedded system hardware design course track for CS students 计算机科学专业学生嵌入式系统硬件设计课程跟踪
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205250
N. Chang, Ikhwan Lee
{"title":"Embedded system hardware design course track for CS students","authors":"N. Chang, Ikhwan Lee","doi":"10.1109/MSE.2003.1205250","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205250","url":null,"abstract":"Qualified software engineers are often in charge of system architecture design, system software design and many hardware-related issues, especially for embedded systems. Nowadays, embedded systems are equipped with fully-functional operating systems, multi-media applications, communication protocols, and so on. Since the portion of software is getting larger and larger than hardware, it is natural that software engineers are more promising in management of system-level design and integration. To supply qualified software engineers, the School of Computer Science and Engineering in Seoul National University offers a series of hardware design courses on embedded systems. They consist of FPGA design, board-level hardware design, microprocessor-based embedded system and system software design. Actual prototype implementations are mandatory in each course. The track ends up with a two-semester design project. The course track produces 20 to 30 CS-background students with intensive experience of hardware design and implementation every year. This paper introduces the outline of the course track and results.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"356 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124494480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Simplifying analog CMOS design for undergraduates 简化大学生模拟CMOS设计
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205296
W. Leigh
{"title":"Simplifying analog CMOS design for undergraduates","authors":"W. Leigh","doi":"10.1109/MSE.2003.1205296","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205296","url":null,"abstract":"We have developed a method of simplifying physical design for undergraduates enrolled in analog VLSI design. The analog CMOS course is a VLSI design course with laboratory that includes design, fabrication and testing of analog CMOS circuits. A student's design begins with a simple current mirror and ends with different types of sampling circuits such as switched-capacitor and autozero circuits. The layout of thest parts is simplified by using cells similar to those used for analog stack generators. By introducing this course, more advanced digital VLSI courses can be taught at the undergraduate level, including those with larger projects.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"429 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113967140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A design project for system design with systemC 一个用systemC进行系统设计的设计方案
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205277
J. DeGroat, A. Raman, Bakr Younis
{"title":"A design project for system design with systemC","authors":"J. DeGroat, A. Raman, Bakr Younis","doi":"10.1109/MSE.2003.1205277","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205277","url":null,"abstract":"In this paper, we propose a co-simulation project involving design of a heterogeneous system based on an 8-bit RISC processor, which could be used to demonstrate system level design. A system, being a heterogeneous environment involves hardware and software modules, with communication involved between the modules. Because system architects and software engineers commonly use C/C++, we demonstrate the use of SystemC, a C++ class library to model the hardware functionality in the system, thus providing a smoother design flow in such an environment. Replacing the traditional hardware description languages (HDLs) with SystemC minimizes the communication overheads involved in current system design flow, decreases simulation time and thus speeds up the design process.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128883517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
On simulating the IP market dynamics in an academic environment using SystemC 用SystemC模拟学术环境下的知识产权市场动态
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205289
Ghaiyyur Quraishi, R. Shankar
{"title":"On simulating the IP market dynamics in an academic environment using SystemC","authors":"Ghaiyyur Quraishi, R. Shankar","doi":"10.1109/MSE.2003.1205289","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205289","url":null,"abstract":"As SoC (System-on-a-chip) methodology emerges, IP (Intellectual Property) development and integration will play a major role in the high-tech industry. To prepare for this future trend, today's graduating seniors should be exposed to concepts such as IP development and reuse. This paper discusses the simulation of an IP market in a class of 52 senior students using an open source system level codesign language called SystemC. The goal was to provide students with a real-life experience of IP development and usage and provide an entrepreneurial experience while providing credit for their participation.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"149 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124160817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Microprocessor interfacing laboratory 微处理器接口实验室
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205276
Derek B. Gottlieb, N. Carter
{"title":"Microprocessor interfacing laboratory","authors":"Derek B. Gottlieb, N. Carter","doi":"10.1109/MSE.2003.1205276","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205276","url":null,"abstract":"This paper summarizes the rationale behind the revision of a microcomputer laboratory course involving hardware software co-design and the integration of microcontroller based systems with a general-purpose microprocessor System. The revised course replaces aging custom hardware with a high-performance PDA running Linux and a feature rich FPGA prototyping board. The resulting course objectives and content as well as early experiences are highlighted.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127594431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Using an FPGA-based SOC approach for senior design projects 在高级设计项目中使用基于fpga的SOC方法
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205235
J. O. Hamblen
{"title":"Using an FPGA-based SOC approach for senior design projects","authors":"J. O. Hamblen","doi":"10.1109/MSE.2003.1205235","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205235","url":null,"abstract":"This paper describes our experiences using a SOC approach to develop capstone design projects for undergraduate students in our electrical and computer engineering curriculum. A commercial FPGA-based SOC development board with a RISC processor IP core is used to support a wide variety of student design projects. A top-down rapid prototyping approach with commercial CAD tools, a C compiler targeted for the RISC processor IP core, and a large field-programmable logic device (FPLD) is used for team-based design projects.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122186740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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