{"title":"在高级设计项目中使用基于fpga的SOC方法","authors":"J. O. Hamblen","doi":"10.1109/MSE.2003.1205235","DOIUrl":null,"url":null,"abstract":"This paper describes our experiences using a SOC approach to develop capstone design projects for undergraduate students in our electrical and computer engineering curriculum. A commercial FPGA-based SOC development board with a RISC processor IP core is used to support a wide variety of student design projects. A top-down rapid prototyping approach with commercial CAD tools, a C compiler targeted for the RISC processor IP core, and a large field-programmable logic device (FPLD) is used for team-based design projects.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Using an FPGA-based SOC approach for senior design projects\",\"authors\":\"J. O. Hamblen\",\"doi\":\"10.1109/MSE.2003.1205235\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes our experiences using a SOC approach to develop capstone design projects for undergraduate students in our electrical and computer engineering curriculum. A commercial FPGA-based SOC development board with a RISC processor IP core is used to support a wide variety of student design projects. A top-down rapid prototyping approach with commercial CAD tools, a C compiler targeted for the RISC processor IP core, and a large field-programmable logic device (FPLD) is used for team-based design projects.\",\"PeriodicalId\":137611,\"journal\":{\"name\":\"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MSE.2003.1205235\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2003.1205235","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Using an FPGA-based SOC approach for senior design projects
This paper describes our experiences using a SOC approach to develop capstone design projects for undergraduate students in our electrical and computer engineering curriculum. A commercial FPGA-based SOC development board with a RISC processor IP core is used to support a wide variety of student design projects. A top-down rapid prototyping approach with commercial CAD tools, a C compiler targeted for the RISC processor IP core, and a large field-programmable logic device (FPLD) is used for team-based design projects.