Alexandre Casacurta, Marcel Furtado Almeida, R. Reis
{"title":"在布局层次上的可视化仿真工具","authors":"Alexandre Casacurta, Marcel Furtado Almeida, R. Reis","doi":"10.1109/MSE.2003.1205278","DOIUrl":null,"url":null,"abstract":"This paper presents a Web-based graphical tool that makes it possible to view and simulate a working circuit at the layout level. This tool allows one to observe changes in logical levels with a dynamic alteration of the color properties of the graphical elements that characterize the circuit at layout level. The layout view changes colors in function of logic level changes. Two aspects of the circuit simulation are presented: taking into account the gates delay or not.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"27 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A visual simulation tool at layout level\",\"authors\":\"Alexandre Casacurta, Marcel Furtado Almeida, R. Reis\",\"doi\":\"10.1109/MSE.2003.1205278\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a Web-based graphical tool that makes it possible to view and simulate a working circuit at the layout level. This tool allows one to observe changes in logical levels with a dynamic alteration of the color properties of the graphical elements that characterize the circuit at layout level. The layout view changes colors in function of logic level changes. Two aspects of the circuit simulation are presented: taking into account the gates delay or not.\",\"PeriodicalId\":137611,\"journal\":{\"name\":\"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03\",\"volume\":\"27 2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MSE.2003.1205278\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2003.1205278","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents a Web-based graphical tool that makes it possible to view and simulate a working circuit at the layout level. This tool allows one to observe changes in logical levels with a dynamic alteration of the color properties of the graphical elements that characterize the circuit at layout level. The layout view changes colors in function of logic level changes. Two aspects of the circuit simulation are presented: taking into account the gates delay or not.