2020 21st International Conference on Electronic Packaging Technology (ICEPT)最新文献_第9页

Mold Flow Analysis of a SiP Package for Power Management 电源管理SiP封装的模流分析

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202517

Y. Duan, Xiyou Wang, Daoguo Yang, Jing Wang, Weibin Ye, Yanchen Wu

{"title":"Mold Flow Analysis of a SiP Package for Power Management","authors":"Y. Duan, Xiyou Wang, Daoguo Yang, Jing Wang, Weibin Ye, Yanchen Wu","doi":"10.1109/ICEPT50128.2020.9202517","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202517","url":null,"abstract":"At present, System in Package (SiP) is getting more and more applications in power packages. Due to the complexity of the packages, the molding process becomes crucial for the yield and reliability of the products. During the transfer molding process, the packaging processes of the packages may introduce assembly defects, such as void, wire sweep, warping, etc. To determine the main factors is one of the most important measures to eliminate and prevent these defects.In this paper, 3D Molding flow simulation for the SiP package is conducted by using the Moldflow software with the aim to predict the location of the void and weld line during the plastic package process. The influence of gate design on process-induced defects and other reliability issues was studied. The results show that the filling of different gate locations in the package will produce cavitation defects at different locations. A gate design with fewer corners in the injection direction will produce fewer cavitation. Increasing the number of gates will reduce air pockets at the corners, but will cause more air pockets near the weld line. When the gate position is perpendicular to the top surface of the chip, less weld marks are generated. The flow front will produce weld marks after being blocked. When the number of gates increases, the area of the flow front increases and the number of weld lines increases significantly.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116007799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Nano-indentation test across the sintered silver/ copper interface 烧结银/铜界面的纳米压痕测试

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202888

Lingyun Liu, F. Qin, Yanwei Dai, Pei Chen

引用次数: 0

Design of high-resolution long working distance double-telecentric projection lens 高分辨率长工作距离双远心投影镜头设计

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202524

Shaohua Chen, Yan Zhang, Minhua Chen

{"title":"Design of high-resolution long working distance double-telecentric projection lens","authors":"Shaohua Chen, Yan Zhang, Minhua Chen","doi":"10.1109/ICEPT50128.2020.9202524","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202524","url":null,"abstract":"In order to improve the accuracy of products fabricated by projection micro-stereolithography technology based on DMD, a high-resolution projection lens with double-telecentric structure and long working distance is designed in this paper. Before the design of projection lens, several parameters should be set first according to design requirements. Then, a grouping design method is proposed to design the initial structure of double-telecentric projection lens. With the help of ZEMAX, the initial structure is optimized to the ideal structure when all parameters are close to the target value. The simulation results show that the designed projection lens has a resolution of 1 μm in X-Y within 6 μm thickness of curable layer in Z axis. Meanwhile, it can be seem from the final projection lens that telecentricity at the whole field of view of object-side and image-side are 0.42° and 0. 43° respectively and working distance at object-side and image-side are 64mm (including the thickness of TIR prism)and 6. 5mm respectively. The projection lens designed with spherical surfaces show the well image quality, small telecentricity and long working distance, which indicates that the projection can be widely used in 3D printer of projection micro-lithography technique based on DMD.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120934655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Photoresponses Improvement of ZnO Thin Film Transistor by Using a HfO2-Al2O3 Double Dielectrics 用HfO2-Al2O3双介质改善ZnO薄膜晶体管的光响应

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202892

Bowen Che, Yongpeng Zhang, Xingwei Ding

引用次数: 0

Microstructure characteristics and properties of copper films sputtered in EMI shielding layer 电磁干扰屏蔽层溅射铜膜的微结构特征及性能

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202580

Nian Zhang, Ming Li

{"title":"Microstructure characteristics and properties of copper films sputtered in EMI shielding layer","authors":"Nian Zhang, Ming Li","doi":"10.1109/ICEPT50128.2020.9202580","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202580","url":null,"abstract":"With the increase of system operating frequency and chip switching speed, electro-magnetic interference (EMI) shielding materials were wildly used in chip packaging technology. Packaging manufacturing process which bring cracks from the outer EMI shielding layer into the inner die has important influence on chip quality. In this paper, the influence on manufacturing parameters, such as film thickness and self-annealing time, on film strength were investigated. The microstructure characteristics and properties of copper films under different film thicknesses and self -annealing time were discussed. Microstructural characteristics were analyzed using field emission scanning electron microscopy (FESEM) and film properties were measured by nano-indentation instrument. Experimental results show that the 4um thickness of sputter copper film can achieve the lowest hardness performance and highest young's modulus of 108.3GPa. After 60 hours of self-annealing at room temperature, the grain was more stable than that of electroplated copper. The film thickness was proved to have significant influence on chips mechanical properties. Microstructure characteristics when stainless steel was sputtered on the top layer is discussed.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122329494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Comprehensive Failure Analysis and A Study on Reliability for BGA Solder Joints Crack of DDR Modules DDR模块BGA焊点裂纹的综合失效分析及可靠性研究

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202884

Jingrui Chai, Xiping Jiang, Xudong Gao, Zhengwen Wang, Pengcheng Yin, Qian Wang, Gang Dong

{"title":"A Comprehensive Failure Analysis and A Study on Reliability for BGA Solder Joints Crack of DDR Modules","authors":"Jingrui Chai, Xiping Jiang, Xudong Gao, Zhengwen Wang, Pengcheng Yin, Qian Wang, Gang Dong","doi":"10.1109/ICEPT50128.2020.9202884","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202884","url":null,"abstract":"nowadays, Double Data Rate (DDR) modules are generally applied in the electronic products. In this paper, the key failure modes for solder joints of DDR module are introduced. For many kinds of finishes, the typical intermetallic compounds (IMCs) found in solder joints are Cu6Sn5, and IMCs like Cu-Ni-Sn are formed at Ni surfaces. With the typical BGA structure, there are 8 possible failure locations where the fracture would occur when the complex external conditions apply to the solder joints. We study the mechanisms explaining how and why the failures happen during the productions’ design, manufacture and application. In order to prevent these failure modes, four reliability test methods of solder joints are suggested which based on the characteristics of solder joints. Consider the cost of the reliability test, we use our presented equivalent anisotropic thermal-structure coupling model to simulate the stress of solder joints. The equivalent model is calculated based on equivalent inclusion method and the uniform distribution method, and the model not only considers the physical parameters and the material properties of the DDR memory, but also considers the thermal coupling. By using the reliability test method and the thermal-structure coupling model in combination, the solder joints reliability of Double Data Rate memory modules can be optimized in the design stage.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125475979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Test Methods and Principles of Thermal Resistance for GaN HEMT Power Devices 氮化镓HEMT功率器件热阻测试方法及原理

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202571

Yanwei Shan, Wei Gao, Zeyou Huang, Weizhe Kuang, Zhanghua Wu, Bo Zhang

{"title":"Test Methods and Principles of Thermal Resistance for GaN HEMT Power Devices","authors":"Yanwei Shan, Wei Gao, Zeyou Huang, Weizhe Kuang, Zhanghua Wu, Bo Zhang","doi":"10.1109/ICEPT50128.2020.9202571","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202571","url":null,"abstract":"As a new generation of power devices, GaN HEMT power devices have the advantages of high operating temperature, high power density and high operating frequency, which can greatly improve the performance of power electronic systems. In order to give full play to the high operating temperature and high-power density characteristics of GaN HEMT power devices, it is necessary to reduce the thermal resistance of the device as much as possible. Due to the device structure and working principle are different from silicon-based devices, the test method of thermal resistance is also different. In this paper, the channel on-resistance (Ron) and the forward voltage drop between gate and source (Vf-gate) are used as temperature-sensitive electrical parameters (TSEPs) to test the thermal characteristics of the GaN HEMT device, and the test methods and principles of thermal resistance of the GaN HEMT device is given by analyzing the different structures. For GaN HEMT devices with junction-gate structure, Ron and Vf-gate can be used as TESP for the thermal resistance test; For GaN HEMT devices without junction-gate structure, Ron can be used as TSEP for the thermal resistance test.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125481256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Parallel and Decoupled XY Flexible Positioning Platform for Micro LED Panel Repair 用于微型LED面板维修的并联解耦XY柔性定位平台

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202966

Wenxiu Lai, Jian Gao, Lanyu Zhang, Yongbin Zhong

{"title":"Parallel and Decoupled XY Flexible Positioning Platform for Micro LED Panel Repair","authors":"Wenxiu Lai, Jian Gao, Lanyu Zhang, Yongbin Zhong","doi":"10.1109/ICEPT50128.2020.9202966","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202966","url":null,"abstract":"In the field of microelectronics packaging, microled mass transferring technology has become the key for manufacturing of large-scale display panel, and the defect repair technology is particularly important for the quality control of the display panel. In general, this repair process requires the motion mechanism to reach and replace the defective chip target in a high-speed and high positioning precision for the entire panel. In order to meet the requirements of MicroLED panel repair, this paper introduces an XY parallel decoupling flexible micro-motion platform for the large-stroke macro-micro composite stage. The flexible platform is guided by two pairs of flexible double bridge amplifying mechanisms, which are distributed symmetrically around the moving platform. The mobile pair, which is spliced by S-type hinges, is connected to the moving platform to achieve the performance of decoupling input and output. Based on the micro stage structure, the flexibility and stiffness analysis are performed through static and dynamic modeling of the flexible platform. The particle swarm optimization method is used for size optimization and mechanism modeling. The performance of the micro-motion stage was verified by finite element simulation analysis. The simulation results show that the XY flexible platform proposed in this paper has good parallel decoupling and amplification ratio, and can be used to develop the macro-micro motion stage for defect repair of MicroLED panel.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127956379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Stripping Process Development using SAPS Megasonic Technology 利用SAPS Megasonic技术开发剥离工艺

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202862

Fei Zhou, Chang Liu, Shu-zi Yang, Xiaoyan Zhang

{"title":"Stripping Process Development using SAPS Megasonic Technology","authors":"Fei Zhou, Chang Liu, Shu-zi Yang, Xiaoyan Zhang","doi":"10.1109/ICEPT50128.2020.9202862","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202862","url":null,"abstract":"Integrated circuit(IC) design, IC manufacturing and IC packaging constitute the three pillars of IC industry. With the development of chip integration and high-density circuit packages, more photolithographic technology step were used in IC industry. As we all know, the purpose of photoresist stripping is to remove photoresist (PR) residues, particles and metal which come from the pattern structures. The photoresist (PR) stripping process is an important factor after photolithography technology which plays a key role in the yield of products. Residual photoresist can cause device layer failure or even damage the device layer.Conventional wet PR stripping, soaking and single chamber stripping is widely used for removal photoresist in advanced packaging. Wet PR stripping uses a specific chemical to dissolve the PR layer. During PR removal process, it will need 20~30min bench soaking method and 5~10min single chemical rinse to accomplish PR strip step which may lead to a low throughput.In this work, the method of \"space alternated phase shift (SAPS)\" mega sonic was applied for the assistance of PR stripping. The mega sonic power could pass through the deep hole of patterns or other complicated patterns with sustained energy, facilitating the removal of photoresist completely. Moreover, the optical microscope was carried out to examine the results of PR removal effects in different pattern wafers and AOI was used to evaluate first pass yield (FPY). Mega sonic energy with different powers and different applied reaction time was rigorously investigated the removal effects of photoresist.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128812676","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Comparative study on optical performances of ultraviolet light-emitting diodes using all-inorganic and organic silicone packaging structure 采用全无机和有机硅封装结构的紫外发光二极管光学性能的比较研究

2020 21st International Conference on Electronic Packaging Technology (ICEPT) Pub Date : 2020-08-01 DOI: 10.1109/ICEPT50128.2020.9202895

Caiman Yan, Jiasheng Li, Sheng Lei, Qiting Zhu, Zongtao Li

{"title":"Comparative study on optical performances of ultraviolet light-emitting diodes using all-inorganic and organic silicone packaging structure","authors":"Caiman Yan, Jiasheng Li, Sheng Lei, Qiting Zhu, Zongtao Li","doi":"10.1109/ICEPT50128.2020.9202895","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202895","url":null,"abstract":"Ultraviolet light-emitting diode (UVLED) has important application prospects in disinfection, sterilization, UV curing, full-spectrum lighting, etc. However, the low light extraction efficiency has severely limited the development of UVLEDs. At present, the two mainstream packaging technology routes for UVLEDs are using all-inorganic packaging structure and organic silicone packaging structure. Yet, there is no detailed study comparing the impact of these two structures on the optical performances of UVLEDs. Herein, this study compares these two kinds of UVLED packaging structures through optical simulation, referred to all-inorganic UVLED and organic UVLED. Simulation indicates that the surface reflectance and inclination angle of the LED bracket have a great impact on the optical performance. In the organic UVLED, the light extraction efficiency can be further improved by increasing the refractive index of organic silicone. After optimization, the radiant flux of organic UVLED is 3.3 times of the all-inorganic UVLED device, and the light output efficiency is improved by 32.6%. Therefore, from the perspective of optical energy utilization, the organic silicone packaging structure is more suitable for UVLED packaging. This research provides a design guide for improving the light output of UVLED devices.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130790189","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0