2020 21st International Conference on Electronic Packaging Technology (ICEPT)最新文献

{"title":"A Study on the Joint Properties and Reliability of 25μm Cu/Ni/Sn-3.5Ag Bonding Process with Chip on Chip Thermal Compression Bonding","authors":"Chu Tang, Wenhui Zhu, Liancheng Wang, Ganglong Li","doi":"10.1109/ICEPT50128.2020.9202998","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202998","url":null,"abstract":"With the further shrinking of chip feature size, Thermocompression bonding (TCB) is widely used in ultra-fine pitch flip welding products. Therefore, research and master important process parameters such as temperature, time and force are crucial to improve the throughput and robustness of TCB processes. In this study, we chose Cu/Sn–3.5Ag 50 μm pitch chip-on-chip (CoC) interconnection with Ni barrier microbumps to evaluate the bonding structure and the bonding strength. The scanning electron microscopy(SEM) was used to investigate the inhibition of Ni on the IMC formation and observe the gap between the upper and lower pillar varied during the TCB processes. We also carried out shear tests on samples fabricated to probe into their effects on the mechanical properties at various TCB processes. Experimental results showed that Cu diffusion to Sn–3.5Ag solder was restricted by the Ni barrier. In addition, the shear strength and gap height of samples exhibited a sensitive dependence of the TCB processes (time, force and temperature).","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129824224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Defect control in epoxy dry film with improved electric performances","authors":"S. Luo, Chunbo Gao, Liqiang Cao, Shuhui Yu, Junyi Yu, Fengwei Dai, R. Sun, C. Wong","doi":"10.1109/ICEPT50128.2020.9202899","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202899","url":null,"abstract":"Advanced adhesive film materials, such as embedded capacitor materials, insulating built-up films, underfill films, die attach films and etc, which have the superiorities of flexibility, controllable thickness, large size, and easy processing, have been widely used in electronic packaging. The reliability of electronic devices is directly related to the internal defects existing in the materials. Under high temperature and high electric field, the space charges in the polymer will accumulate at the interface around the defect. When the density of charge carriers approaches a critical value, the electric components will be brokendown. Herein, we try to prevent the formation of defects like pores and pits in epoxy based composite films and the relevant mechanism is investigated. The surface morphology of the films is modified by adding a defoamer and a leveling agent. The defoamer agent can assist the breakage and elimination of bubbles. The leveling agent can improve the flowability of the half-dry film and then fill the pits formed after the breakage of bubbles. The effect of defects on the Weibull distribution of electric breakdown strength of the epoxy composite films has been analyzed. It proves that high electric breakdown strength can be achieved on the film with improved surface morphology. This study gives a guide for designing high quality epoxy films with improved electrical performance.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128592736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Effect of Design Factors of a Mobile Phone on the Reliability Risks of On-Board Packages Under Product-Level Drop Conditions","authors":"Z. Liu, Lei Shi, Zhuo Chen, Wenhui Zhu","doi":"10.1109/ICEPT50128.2020.9202509","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202509","url":null,"abstract":"Smart mobile phones are susceptible to drop impact so the reliability of on-board packages under drop condition is a major concern to be addressed. For the efficiency of rapid prototyping, it is quite important that the product design, especially that of the main circuit board, is pre-examined in respect of its effect on the stress distribution In this study, finite element analysis is applied to investigate the effect of design factors of a mobile phone on the drop reliability of the on-board chip scale packages. Simulation results show that, screw pitch and area of shielding cover significantly affect the bending of PCB (printed circuit board), as smaller screw pitch and larger shielding cover resulted in the reduction of maximum principal stress in the silicon chip as well as in the critical solder joint by 20% to 30%. By using underfill, stress distribution in the solder became more uniform, and maximum principal stress in both chip and solder lowered than that without underfill. In addition, insufficient gap between the chip and front case might lead to collision, thereby causing the peak stress in the packages to increase significantly by about 30 MPa compared to the non-collision case. The research methods and results in this study are expected to provide guidance for the structural optimization in new mobile phone product design, as well as design-phase early screening of failure in the board-level assembly.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124766382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Thick-film Conformal Circuit Forming Method Based on Surface Partitioning and Flexible Frame Screen Printing","authors":"Tianyu Hou, Hua Chen, Shujie Liu, Yujie Li","doi":"10.1109/ICEPT50128.2020.9202559","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202559","url":null,"abstract":"Conformal circuits integrate mechanical structures and electrical performance, improving the design flexibility and equipment reliability. It enables the conformal circuit a promising alternative to the traditional printed circuit boards and independent electric wires in the fields of communication devices, automotive electronics, and medical equipment. Conformal circuits can be fabricated by several techniques such as 3D printing and 3D molding interconnect device (3D-MID) fabrication technique. However, the point-by-point reconstruction of the curved surfaces and the complex configuration of the equipment significantly reduce the efficiency and the cost effectiveness. The small thicknesses and sizes of the conductive layers fabricated by these techniques limit the application of the conformal circuits in the high current circuits. In this paper, a thick-film conformal circuit forming method based on the surface partitioning and the flexible frame screen printing is presented. The partitioning process divides the complex surface into finite number of subareas with generatrices of simple shapes and guide lines with single extension directions, limiting the mean curvature variations and the lengths of guide lines. In each subarea, flexible frames can be fixed along its guide lines and the screen can then be tensioned along its generatrix uniformly, ensuring the forming of circuits on the curved surfaces which cannot be achieved by the traditional screen printing with a rigid frame. The conformal circuits were fabricated on the external surface of an actual workpiece. The Gaussian curvature of the surface varied from - 2.2×10-3 to 1.1×10-3 mm-2. The maximum variation of the mean curvature among all subareas after the partitioning was 0~6×10-3 mm-1, two orders of magnitude lower than that of the entire surface. The uniformity and the deviation of the linewidths were around ±41 μm and ±43 μm, comparable to the printed circuits on the planar surfaces. The resistivity of the printed circuits was 7.1±0.2 μΩ•cm, 29% higher than the nominal resistivity of the silver paste used as the conductive materials in this work. The results demonstrate the effectiveness of the method presented in this paper and the potential to efficiently prepare complicated conformal circuits with a high aspect ratio on curved surfaces.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129069301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Investigation of the intermetallic compounds growth in 10μm Cu/Sn and Cu/Ni/Sn microbumps under isothermal temperature aging","authors":"Yihao Yin, Huiqin Ling, F. Guo, A. Hu, Ming Li","doi":"10.1109/ICEPT50128.2020.9202603","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202603","url":null,"abstract":"Due to diameter reduction of microbumps in higher integration packaging structures, the solder will be consumed quickly due to fast intermetallic compounds (IMCs) growth. Brittle IMCs can cause interconnection reliability problems. Limited by the height and volume in Ф10μm microbumps, a thin Ni barrier layer about 600 nm was introduced between Cu pillar and solder Sn to slow IMCs growth in this study. The microstructure evolution and IMCs growth behavior during 170 °C isothermal aging of both Cu/Sn and Cu/Ni/Sn microbumps were investigated. It has been found that thin Ni barrier layer can restrain IMCs growth rate. Cu/Sn and Cu/Ni/Sn systems diffusion coefficients were 4.44 × 10−17 m2/s and 1.33 × 10−17 m2/s. Thin Ni barrier blocked atomic diffusion and stabilized the high temperature Cu6Sn5 phase, avoiding stress induced by phase transformation. Reliability of microbumps was improved.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"75 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123220842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High threshold voltage GaN HEMT with mixed conductive channel","authors":"Wanjie Li, Luqi Tao, Liming Wang, Xu Zhang, Xian-dong Li, Xianping Chen","doi":"10.1109/ICEPT50128.2020.9202906","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202906","url":null,"abstract":"In recent years, wide-band-gap semiconductor materials silicon carbide (SiC) and gallium nitride (GaN) are receiving widespread attention because of their superior performance. In particular, GaN devices have been applied in the fields of low-voltage miniaturized power supplies and 5G communications. For GaN high electron mobility transistor (HEMT) devices used in miniaturized power supplies, the lower threshold voltage (Vth) is a problem that needs to be solved urgently. In this paper, the HEMT device having a novel mixed conducting channel. The device raises the threshold voltage to 3.21V while the saturation current capability still reached 0.46A/mm. As with conventional devices, the saturation current capability of the new device is affected by the Al composition of the barrier layer. But unlike conventional devices, the threshold voltage of the device can be adjusted by changing the doping concentration of the p-type doped layer within a certain range.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121215166","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A novel control method of Double-Clamp ZVS converter for ultra-high power density power module","authors":"Cheng Gu, Qinsong Qian, Song Ding, Ruochen Wang, Qi Liu, Shen Xu, Dongjie Chen","doi":"10.1109/ICEPT50128.2020.9202511","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202511","url":null,"abstract":"Ultra-high power density power module presents many design and optimization challenges of power supply. How to effectively interfaces the wide input range, high efficiency, with higher power density is a great challenge for power supply designers. Traditional DC-DC converters usually need considerable space with relatively low operating frequency and transmission efficiency. In this paper, a novel control method based on Double-Clamp ZVS converter is proposed to realize the ultra-high power density for power module. According to simulations, the topology realizes high transmission efficiency (96.33%) in 1MHz with wide input voltage range (200V-420VDC). Moreover, the voltage ratings applied to switches can be decreased obviously, which is very suitable for the design of ultra-high power density power module.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121434132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development of 3D Wafer Level Package for SAW Filters Using Thin Film Lamination","authors":"Zuohuan Chen, Mingchuan Zhang, Kai Zhu, Feng Jiang, Daquan Yu","doi":"10.1109/ICEPT50128.2020.9202920","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202920","url":null,"abstract":"As the accelerating development of mobile communication, 3D wafer level packaging (3D-WLP) has attracted much attention since it can provide smaller form factors, lower cost and better electrical and thermal performance.In this paper, the design and process development for an ultra-small 3D-WLP with the size of 1070 μm×920 μm ×355 μm for a SAW filter was comprehensively studied. In the present package, thin dry films were used to generate a gas-filled cavity structure, which provided a stable and safe environment for the interdigital transducers (IDT) structure from the contaminants or corrosions to ensure reliability. Through film via interconnects were formed to contact the chip’s pads and the solder balls formed with the Ni/Au under bump metallization (UBM). Finally, the wafer was diced into individual packages.Finite element modeling (FEM) was used to simulate the mechanical stress during the actual packaging process. The effects of cavity structure and geometric parameters on the peeling stress values were studied using FEM, and some recommendations were given for package structure optimization. Based on the above studies, the optimized SAW packages successfully passed the reliability test of pre-con level 3.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114631887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Composite feedforward - fuzzy PID control based on IC package for Wafer Level Flip-chip Equipment Motion Platform","authors":"Yunbo He, Qihao Qian","doi":"10.1109/ICEPT50128.2020.9202874","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202874","url":null,"abstract":"In the process of rapid development of semi- conductor industry, IC packaging equipment requires high precision and speed of motion platform. Motion platform with high acceleration and high precision plays a key role in precise positioning of wafer level flip-chip equipment. Composite in this paper, speed, acceleration and jerk feedforward control and fuzzy PID control method, compared with the traditional PID control can improve motion platform speed and precision of location, and diminish shock and vibration of mechanical components caused by high acceleration and jerk. Quartic polynomial type speed planning algorithm based on S-shaped curve is proposed, which makes acceleration and deceleration smooth and fast. The simulation experimental results show that the proposed method can effectively reduce the adjustment time, reduce the overshooting of the tracking, respond quickly, and meet the performance requirements of moving platform on the microelectronic packaging equipment.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":" 16","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113951542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Research of Electrical Connection Between Chip and PCB Based on Conductive Adhesive Film","authors":"Zihao Ming, Xiaosong Ma, Z. Zhong, Keye Wu, Changhua Tang","doi":"10.1109/ICEPT50128.2020.9202864","DOIUrl":"https://doi.org/10.1109/ICEPT50128.2020.9202864","url":null,"abstract":"PCB interconnection is the most common type of electrical interconnection. Solder paste welding is the most widely used type of electrical connection of chip on PCB. In this paper, a method of using conductive adhesive film and connector to realize the mechanical pressure type electrical connection of the chip is proposed, so as to try to solve the problem of overheating and damage in the solder paste welding of the thermal sensitive chip. The thickness of conductive adhesive film is 0.1 millimeter, when it is under vertical pressure, it will be conductive. In this research, the conductive adhesive film and the chip are mechanically fixed on the circuit board by the connector, the conductive adhesive film is placed between the chip and the PCB. The circuit adopts digital power amplifier. The chip in the circuit is YDA138-E in SSOP package, and the connector material is high temperature resistant nylon. Because the clamping force of the connector directly acts on the top of the chip, the stress on the electrical connection position of the conductive adhesive film completely depends on the interference area between the connector and the PCB assembly. And the stress increases with the increase of interference area. With ANSYS simulation software, an interconnection model including circuit board, connector and other devices is established. The static analysis of the circuit model is carried out by finite element method. The range of the interference area is obtained, and to eliminate the interference area under the condition of significantly uneven stress distribution. Because the thickness of conductive adhesive film is very thin, its deformation and stress can be ignored, so only the thickness of the film is used as the compensation of interference area. Take several interference values inside and outside the interval, and assemble connectors according to different value results. In the case of the same input signal, use oscilloscope to detect and collect output electric signals of several circuit boards as sample signals, and take the output electric signal of the circuit under the solder paste electrical connection type as the reference signal. With MATLAB data analysis software, the degree of relevance between the sample signal and the reference signal collected by the oscilloscope is analyzed quantitatively. Finally, it is concluded that the reference signal and sample signal have high similarity in frequency domain. There is a delay in the time domain between the sample signal and the reference signal. The chip can work normally under the electric connection of the conductive adhesive film. and can be used as a reference method to solve the problem of chip overheating damage.","PeriodicalId":136777,"journal":{"name":"2020 21st International Conference on Electronic Packaging Technology (ICEPT)","volume":"19 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113958737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}