ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)最新文献_第9页

Partitioning framework for less restricted partitioning problems 用于限制较少的分区问题的分区框架

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820836

Hyunok Oh, S. Ha

引用次数: 2

A bias dependent source/drain resistance model in LDD MOSFET devices for distortion analysis 用于畸变分析的LDD MOSFET器件中与偏置相关的源漏电阻模型

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820870

Kwang-Hoon Oh, Zhiping Yu, R. Dutton

引用次数: 3

LSI design toward 2010 and low-power technology 面向2010年的LSI设计和低功耗技术

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820921

T. Sakurai

{"title":"LSI design toward 2010 and low-power technology","authors":"T. Sakurai","doi":"10.1109/ICVC.1999.820921","DOIUrl":"https://doi.org/10.1109/ICVC.1999.820921","url":null,"abstract":"If we look into the scaling law carefully, we find that three crises can be foreseen for realizing LSI's in the year 2010: power crisis, interconnection crisis, and complexity crisis. Lowering supply voltage (V/sub DD/) is very effective in reducing the power but the threshold voltage (V/sub TH/) should be reduced at the same time for high-speed operation. The low V/sub TH/ however, increases the leakage current. To overcome this situation, V/sub TH/ and V/sub DD/ control through the use of multiple V/sub TH/, variable V/sub TH/, multiple V/sub DD/ and variable V/sub DD/ are being pursued. At the system level, a system LSI approach is promising for realizing low power. The new trend is to exploit the cooperation of software and hardware. For sub 1-volt design, abnormal temperature dependence of drain current may be important. The interconnection will determine cost, delay, power, reliability and turn-around time of future LSI's. The RC delay problem can be solved through an LSI architecture realizing \"the further, the less communication\" with the help of local memories. The complexity issue can only be solved by the sharing and re-use of design data, and the so-called IP-based design will be preferable.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"7 1","pages":"325-334"},"PeriodicalIF":0.0,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87507327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Improvement of hot carrier lifetime by cleaning process prior to selective reoxidation in metal gate LDD nMOSFETs 金属栅极LDD nmosfet中选择性再氧化前清洗工艺对热载流子寿命的改善

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820978

Jae-Hyung Kim, J. Choy, Duk-Hee Lee, Shin-Young Cheong, Young-Hoon Kim, J. Son, Youngjong Lee, Kyungho Lee

引用次数: 0

A design of 2-D DCT/IDCT for real-time video applications 用于实时视频应用的二维DCT/IDCT设计

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820999

Igkyun Kim, J. Cha, Hanjin Cho

引用次数: 7

An integrated CDMA intermediate-frequency transceiver for 10-MHz wireless local loop 用于10mhz无线本地环路的集成CDMA中频收发器

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820932

Jong-Moon Kim, Ho-Jun Song, Jae-heon Lee, Sang-Woo Hwang

引用次数: 0

Improved planarization method using sandwiched hard layer (SHaL) CMP 改进的夹层硬层(SHaL) CMP平面化方法

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820986

J.Y. Kim, B. Yoon, S. Hah, J. Moon, S.I. Lee

引用次数: 0

An efficient turbo decoder architecture for IMT2000 一种适用于IMT2000的高效涡轮解码器架构

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820911

I. S. Jeon, Bong Seop Song, K. Kim, Han Jin Cho, W. Kim

{"title":"An efficient turbo decoder architecture for IMT2000","authors":"I. S. Jeon, Bong Seop Song, K. Kim, Han Jin Cho, W. Kim","doi":"10.1109/ICVC.1999.820911","DOIUrl":"https://doi.org/10.1109/ICVC.1999.820911","url":null,"abstract":"In this paper, we present an efficient architecture of turbo decoder for IMT2000 system. We introduce a base 2 logarithmic maximum a-posteriori algorithm (log/sub 2/MAP) whose architecture is simpler than that of the conventional natural logarithmic MAP algorithm (log/sub e/MAP). With log/sub 2/MAP, we obtain a '2 function' which is simpler than the 'E function' used by log/sub e/MAP. In order to implement the architecture of the 2 function, we use approximated binary logarithmic algorithm (ABLA) which has been usefully adopted in DSP. Using ABLA, we can reduce the RAM size from 1 kbytes to 96 bytes, which can be implemented using combinational logic gates. Also, we design the simple normalization module by making all the branch metrics to have positive values. We introduce reverse interleaver and deinterleaver to calculate forward and reverse state metric simultaneously. Using our architecture, we obtained BER of 9.79/spl times/10/sup -7/ at Eb/No of 2 dB and 5th iterations for constraint length K=4, code rate R=1/2, jumping window of 512 bits and interleaver size of 1144 bits, i.e. data rate of 57.6 kbps.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"10 1","pages":"301-304"},"PeriodicalIF":0.0,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88678664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Ultra thin-oxide damage from gate charging during PETEOS deposition processing PETEOS沉积过程中栅极充电造成的超薄氧化物损伤

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820894

Young-Gwan Kim, Hazoong Kim, Kang-Sik Youn, D. Kang, J. Hwang

引用次数: 0

New shallow trench isolation scheme with /spl alpha/-Si absorption layer for sub-0.18 /spl mu/m technology 采用/spl α /-Si吸收层的浅沟隔离新方案，适用于低于0.18 /spl mu/m的技术

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI: 10.1109/ICVC.1999.820847

J. Ku, Sue J. Oh, S. Hong, Hyeongsoo Kim, Sibum Kim, Sam-Dong Kim, Chung-Tae Kim

引用次数: 0