LSI design toward 2010 and low-power technology

T. Sakurai
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引用次数: 4

Abstract

If we look into the scaling law carefully, we find that three crises can be foreseen for realizing LSI's in the year 2010: power crisis, interconnection crisis, and complexity crisis. Lowering supply voltage (V/sub DD/) is very effective in reducing the power but the threshold voltage (V/sub TH/) should be reduced at the same time for high-speed operation. The low V/sub TH/ however, increases the leakage current. To overcome this situation, V/sub TH/ and V/sub DD/ control through the use of multiple V/sub TH/, variable V/sub TH/, multiple V/sub DD/ and variable V/sub DD/ are being pursued. At the system level, a system LSI approach is promising for realizing low power. The new trend is to exploit the cooperation of software and hardware. For sub 1-volt design, abnormal temperature dependence of drain current may be important. The interconnection will determine cost, delay, power, reliability and turn-around time of future LSI's. The RC delay problem can be solved through an LSI architecture realizing "the further, the less communication" with the help of local memories. The complexity issue can only be solved by the sharing and re-use of design data, and the so-called IP-based design will be preferable.
面向2010年的LSI设计和低功耗技术
如果我们仔细研究缩放规律,我们可以预见到2010年实现大规模集成电路的三个危机:功率危机、互连危机和复杂性危机。降低电源电压(V/sub DD/)对降低功率非常有效,但为了高速运行,同时应降低阈值电压(V/sub TH/)。然而,低V/sub / TH/增加了泄漏电流。为了克服这种情况,正在通过使用多个V/sub TH/、可变V/sub TH/、多个V/sub DD/和可变V/sub DD/来控制V/sub TH/和V/sub DD/。在系统级,系统LSI方法有望实现低功耗。新的趋势是开发软件和硬件的合作。对于低于1伏的设计,漏极电流的异常温度依赖性可能很重要。互连将决定未来大规模集成电路的成本、延迟、功耗、可靠性和周转时间。通过利用局部存储器实现“越远,通信越少”的大规模集成电路结构,可以解决RC延迟问题。复杂性问题只能通过设计数据的共享和重用来解决,而所谓的基于ip的设计将是更好的选择。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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