{"title":"Just what is ... ATCA","authors":"J. Eder","doi":"10.1049/ess:20040510","DOIUrl":"https://doi.org/10.1049/ess:20040510","url":null,"abstract":"","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"2019 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-02-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121343451","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Consumer confusion [mobile phone software]","authors":"C. Edwards","doi":"10.1049/ESS:20050101","DOIUrl":"https://doi.org/10.1049/ESS:20050101","url":null,"abstract":"The mobile phone industry is developing a split personality, which is having a knock-on effect on the design of handsets. Although the hardware side is getting easier for 2.5 G handsets, the software side demands as much attention to commercial politics as technical detail. This article discusses open-market and operator-centric phone software with respect to operator services, picture phones, mp3 support and the use of Java. Business models for various operational scenarios are also examined.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121810261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Model motors [software development for automotive applications]","authors":"C. Edwards","doi":"10.1049/ESS:20050104","DOIUrl":"https://doi.org/10.1049/ESS:20050104","url":null,"abstract":"This article discusses software development methods for automotive applications. The emphasis is on software quality and reliability as well as speed of development. Development tools and methods such as agile development and extreme programming are described in detail along with software testing methods. Application areas examined include, engine control, steering systems, GPS navigation, and in-car entertainment.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129081135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analogue dialogue [3G mobile phone power saving]","authors":"D. Sinai","doi":"10.1049/ESS:20050102","DOIUrl":"https://doi.org/10.1049/ESS:20050102","url":null,"abstract":"Power consumption remains a challenge in the design of 3G mobile phones. Although power-saving design is generally associated with the digital part of a multimedia terminal, careful partitioning between analogue and digital implementation can yield big power savings, particularly the audio and user-interface subsystems. This article suggests various power-saving strategies, illustrated by examples in the audio output, audio sample rate conversion, codecs, and touchscreen interface subsystems.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122405897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Embedded devices next on the virus target list","authors":"M. Piercy","doi":"10.1049/ESS:20040612","DOIUrl":"https://doi.org/10.1049/ESS:20040612","url":null,"abstract":"Well, it has finally happened: we have had the first true mobile-phone worm. What's surprising is that anyone in the mobile or IT sectors is amazed about it.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114345279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Just what is LVDS","authors":"C. Ferland","doi":"10.1049/ESS:20040607","DOIUrl":"https://doi.org/10.1049/ESS:20040607","url":null,"abstract":"Parallel signalling is running out of steam as data rates head into the gigabit per second realm. Differential signalling offers a way forward, and LVDS will be one of the most common forms used. Differential signaling is becoming more commonly used in electronics systems because it is able to transfer data much faster and more reliably than single ended technologies due to its noise immunity and resilience to the destructive effects of long transmissions and loading. There is a variety of differential signalling systems, including low-voltage differential signalling (LVDS) and current-mode logic (CML). All realise these benefits while using various voltage levels and driving strengths for differing applications. LVDS is ideally suited for data rates from 250 Mbit/s to 1 Gbit/s. In addition to data rate improvements, LVDS emits low levels of EMI - a feature of great importance due to the high-frequency content of today's electronic devices.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132816251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Every atom counts","authors":"A. Asenov","doi":"10.1049/ESS:20040605","DOIUrl":"https://doi.org/10.1049/ESS:20040605","url":null,"abstract":"With CMOS scaling to nanometre dimensions near the end of the roadmap, atomic scale effects will introduce increasingly large variations between the characteristics of individual transistors, hampering their integration into Giga-transistor chips. Device characteristics mismatch are starting to affect already the function and the reliability not only of analogue but also digital circuits and systems. The designer should be acutely aware of the forthcoming problems. A shift to fault-tolerant design, that includes support for redundancy, self-organising and reconfigurable architectures and intensive on-chip testing will be needed to combat the increasing levels of intrinsic parameter fluctuations that will accompany transistor scaling in the next two decades.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128306178","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Step back to see more [transaction level SoC debugging and verification]","authors":"Y. Hsu","doi":"10.1049/ESS:20040602","DOIUrl":"https://doi.org/10.1049/ESS:20040602","url":null,"abstract":"The design, debug and verification of embedded system-on-chips (SoCs) produces a series of obstacles. Transfer level (RTL) simulation of large designs - a necessary part of the debug process - can generate tremendous amounts of signal-level data that the engineer must then track and analyse. Clearly, there is a need for a better debug and verification methodology. Most embedded SoC architects are really concerned with the transactions that result from software requests, such as the reads from and writes to memory. This article proposes that it is desirable to migrate to a higher level of abstraction that works at the transaction level. This abstraction level offers a viable high-utility complement to debugging with just RTL simulation data.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134526121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Bending the rules","authors":"L. Collins","doi":"10.1049/ess:20040606","DOIUrl":"https://doi.org/10.1049/ess:20040606","url":null,"abstract":"Chipmakers are turning to water as the way to delay a massively expensive and difficult transition to lithography based on soft X-rays. The overall resolution of the optical system is defined by the wavelength of the illuminating light divided by the numerical aperture (NA) of the lens system; the higher the NA value, the greater the possible resolution. The NA of the illumination optics is defined by the sharpness of the cone of light that is focused by the final lens onto the wafer and the refractive index of the material it passes through on the way. One way to increase the NA and thus the overall resolution is to use a medium between the lens and the wafer with a refractive index that is higher than air's value of 1. Water, with a refractive index of 1.33, pushes up the NA of the lens system and also helps avoid internal reflections in the lens and reflections from the resist. Going from dry lithography to wet lithography will improve minimum resolutions. It also reduces the angle of incidence and therefore increases the depth of focus.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130962160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Stress tests [reusable design verification components]","authors":"D. Galpin","doi":"10.1049/ESS:20040601","DOIUrl":"https://doi.org/10.1049/ESS:20040601","url":null,"abstract":"Reusable verification components provide a way of streamlining the process of checking not just logic blocks but protocol stacks and system designs. Used in combination with other techniques, they can provide a way of stressing the system to reveal bugs other approaches would not find. Building reusable devices for verification is becoming a must in order to reduce the verification overhead for designs. However, it is no longer enough to simply build a device which can only attach to a design under test (DUT) or bus and operate in a single way Instead, verification components (VCs) are becoming more common. Such devices provide a reusable way of testing devices with a common functionality or common protocol. However, it is also becoming necessary to be able to reuse what have traditionally been block-level verification devices at the system level.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134360830","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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