每个原子都很重要

A. Asenov
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引用次数: 1

摘要

随着CMOS扩展到纳米尺寸,原子尺度效应将在单个晶体管的特性之间引入越来越大的差异,从而阻碍它们集成到千兆晶体管芯片中。器件特性失配已经开始影响模拟和数字电路和系统的功能和可靠性。设计师应该敏锐地意识到即将出现的问题。为了应对未来20年晶体管规模不断扩大带来的内在参数波动,需要转向容错设计,包括支持冗余、自组织和可重构架构,以及密集的片上测试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Every atom counts
With CMOS scaling to nanometre dimensions near the end of the roadmap, atomic scale effects will introduce increasingly large variations between the characteristics of individual transistors, hampering their integration into Giga-transistor chips. Device characteristics mismatch are starting to affect already the function and the reliability not only of analogue but also digital circuits and systems. The designer should be acutely aware of the forthcoming problems. A shift to fault-tolerant design, that includes support for redundancy, self-organising and reconfigurable architectures and intensive on-chip testing will be needed to combat the increasing levels of intrinsic parameter fluctuations that will accompany transistor scaling in the next two decades.
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