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[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic最新文献

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A completeness criterion for semi-affine algebras 半仿射代数的完备性判据
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186812
Á. Szendrei
{"title":"A completeness criterion for semi-affine algebras","authors":"Á. Szendrei","doi":"10.1109/ISMVL.1992.186812","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186812","url":null,"abstract":"A semi-affine algebra is considered complete if it is a simple affine algebra, and the question of under what conditions a semi-affine algebra is complete is investigated. It is determined that a finite algebra A that is semi-affine with respect to an elementary Abelian group is complete if and only if A admits no nontrival congruence of the group and no q-regular relation corresponding to a q-regular family of congruences of the group, and A is not isomorphic to a matrix power of a unary semi-affine algebra.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123077705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Application of fail-safe multiple-valued logic for control of power press 故障安全多值逻辑在压力机控制中的应用
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186792
M. Sakai, Masakazu Kato, K. Futsuhara, M. Mukaidono
{"title":"Application of fail-safe multiple-valued logic for control of power press","authors":"M. Sakai, Masakazu Kato, K. Futsuhara, M. Mukaidono","doi":"10.1109/ISMVL.1992.186792","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186792","url":null,"abstract":"The logical construction of a safety control for the operation of a power press is explicated. Fail-safe dual two-rail system signal processing and fail-safe multivalued logic operations as methods for achieving this control as a fail-safe system are described. A circuit for generating fail-safe two-rail run button signals based on ternary logic for concrete operation of the power press and an operation control circuit for confirming brake performance for each cycle of slide operation by using the run button signals are presented.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133124893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
On set-valued functions and Boolean collections 集值函数和布尔集合
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186803
R. Tosic, I. Stojmenovic, D. Simovici, C. Reischer
{"title":"On set-valued functions and Boolean collections","authors":"R. Tosic, I. Stojmenovic, D. Simovici, C. Reischer","doi":"10.1109/ISMVL.1992.186803","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186803","url":null,"abstract":"The notion of a Boolean collection of set is introduced, and several combinatorial aspects of these collections are exploited. These collections of set appear to play a role in the approximation of non-Boolean set-valued functions by Boolean functions and, therefore, are relevant in the study of biocircuits and in the study of circuits based on frequency multiplexing, where set-valued functions are used.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131881285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
On the performance of multivalued integrated circuits: past, present and future 关于多值集成电路的性能:过去、现在和未来
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186790
D. Etiemble
{"title":"On the performance of multivalued integrated circuits: past, present and future","authors":"D. Etiemble","doi":"10.1109/ISMVL.1992.186790","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186790","url":null,"abstract":"The characteristics of the successful m-valued I/sup 2/L and ROMs that have been designed in the past are examined, and the reasons for their success are discussed. The problems associated with scaling of m-valued CMOS current mode circuits are examined. The tolerance issue, the respective propagation delays of binary and m-valued ICs, and the interconnection issue are considered. The challenges for m-valued circuits in competition with the exponential performance increase of binary circuits are identified.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133315774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 35
Unique folding and hysteresis characteristics of RTD for multi-valued logic and counting applications 多值逻辑和计数应用中RTD独特的折叠和迟滞特性
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186774
Sen Jung Wei, H. Lin
{"title":"Unique folding and hysteresis characteristics of RTD for multi-valued logic and counting applications","authors":"Sen Jung Wei, H. Lin","doi":"10.1109/ISMVL.1992.186774","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186774","url":null,"abstract":"A multivalued counter and a multivalued full adder based on the resonant tunneling diode (RTD) are described. The counter takes advantage of the hysteresis I-V characteristic to increase the tolerances of the circuit. The counter can operate for a wide range of input pulse characteristics and circuit parameters. The sum output of the full adder is generated by taking advantage of the folding characteristic of multipeak RTDs. The speed of the full adder is greatly improved because of the parallel processing of the carry output and the sum output. SPICE3 simulations of a quaternary full adder show that the full adder could operate above 1 GHz. Experimental results for breadboarded circuits are presented for a three-valued counter and a ternary full adder.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133513698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Fundamental properties of extended Kleene-Stone logic functions 扩展Kleene-Stone逻辑函数的基本性质
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186802
N. Takagi, K. Nakashima, M. Mukaidono
{"title":"Fundamental properties of extended Kleene-Stone logic functions","authors":"N. Takagi, K. Nakashima, M. Mukaidono","doi":"10.1109/ISMVL.1992.186802","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186802","url":null,"abstract":"In order to treat modality (necessity, possibility) in fuzzy logic, the intuitionistic logical negation is required. Infinite multivalued logic functions that introduce the intuitionistic logical negation into fuzzy logic functions are called Kleene-Stone logic functions, and they make it possible to treat modality. The domain in which Kleene-Stone logic functions can handle modality, however, is too limited. The authors define alpha -KS logic functions as infinite multivalued logic functions using a unary operation instead of the intuitionistic logical negation of Kleene-Stone logic functions. Some algebraic properties of alpha -KS logic functions are demonstrated, and a necessary and sufficient condition for a seven-valued logic function to be an alpha -KS logic function is shown.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131468111","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Set-valued logic networks based on optical wavelength multiplexing 基于光波长复用的集值逻辑网络
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186807
S. Maeda, T. Aoki, T. Higuchi
{"title":"Set-valued logic networks based on optical wavelength multiplexing","authors":"S. Maeda, T. Aoki, T. Higuchi","doi":"10.1109/ISMVL.1992.186807","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186807","url":null,"abstract":"A set-valued logic network that uses multiwavelength optical circuits to attack the interconnection problems characteristic of highly parallel computing architectures is presented. The basic concept is logic-value multiplexing, which means the simultaneous transmission of logic values represented by optical wavelengths through a waveguide. This concept allows simultaneous execution of several binary operations in a single module to be realized. The systematic design of the set-valued logic network is presented, and it is applied to the sorting network to demonstrate its potential for reducing interconnection complexity.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128789395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Optimal output assignment and the maximum number of implicants needed to cover the multiple-valued logic functions 覆盖多值逻辑函数所需的最优输出分配和最大隐含数
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186821
Y. Hata, F. Miyawaki, K. Yamato
{"title":"Optimal output assignment and the maximum number of implicants needed to cover the multiple-valued logic functions","authors":"Y. Hata, F. Miyawaki, K. Yamato","doi":"10.1109/ISMVL.1992.186821","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186821","url":null,"abstract":"Optimal output assignment is proposed to reduce the number of implicants in a minimal sum-of-products expression, where sum refers to TSUM. Some bounds on the maximum number of implicants needed to cover an output permuted function are clarified. One-variable output permuted functions require at most p-1 implicants in their minimal sum-of-products expressions, where p is the radix. Two-variable functions with radix between three and six are analyzed. Some speculations on the minimum number of the implicants are confirmed for functions with a higher radix and more than two variables. Computer simulation shows that output-permuted functions require 15% fewer implicants on the average.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131171618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
The theory of clipping voltage-switches and design of quaternary nMOS circuits 箝位电压开关的原理及四元nMOS电路的设计
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186786
Xunwei Wu
{"title":"The theory of clipping voltage-switches and design of quaternary nMOS circuits","authors":"Xunwei Wu","doi":"10.1109/ISMVL.1992.186786","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186786","url":null,"abstract":"A theory of clipping voltage-switches suitable to quaternary nMOS circuits is proposed. It is based on the viewpoint that switching states of elements and signals in a circuit should be described separately by using switching variables and signal variables. Threshold comparison operations and voltage-clipping operation that can reflect the working principle of nMOS circuits are introduced. Their relative properties and logic-function expressions are discussed. Some basic quaternary nMOS circuits are designed in order to demonstrate the procedure.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125057607","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Layered MVL neural networks capable of recognizing translated characters 能够识别翻译字符的分层MVL神经网络
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186782
Tatsuki Watanabe, M. Matsumoto
{"title":"Layered MVL neural networks capable of recognizing translated characters","authors":"Tatsuki Watanabe, M. Matsumoto","doi":"10.1109/ISMVL.1992.186782","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186782","url":null,"abstract":"The multivalued logic (MVL) neurons constituting the layered MVL neural network use MVL operations to produce analog responses to be fed to the respective quantizers. A four-layered MVL neural network model capable of recognizing translated characters is presented. Translation of input characters is easily carried out because MVL neural networks have the unique ability that the input patterns for which such a network has been trained can be reproduced directly from the states of synapse weights. Simulation results showing successful recognition of translated characters are presented.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133085192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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