多值逻辑和计数应用中RTD独特的折叠和迟滞特性

[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI:10.1109/ISMVL.1992.186774

Sen Jung Wei, H. Lin

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引用次数: 6

摘要

介绍了一种基于谐振隧道二极管(RTD)的多值计数器和多值全加法器。计数器利用磁滞I-V特性来增加电路的容差。该计数器可以在宽范围的输入脉冲特性和电路参数下工作。利用多峰rtd的折叠特性产生全加法器的和输出。由于进位输出和求和输出的并行处理，使得全加法器的运算速度大大提高。对四元全加法器的SPICE3仿真表明，该全加法器可以工作在1ghz以上。给出了三值计数器和三元全加法器在面包板电路上的实验结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Unique folding and hysteresis characteristics of RTD for multi-valued logic and counting applications

A multivalued counter and a multivalued full adder based on the resonant tunneling diode (RTD) are described. The counter takes advantage of the hysteresis I-V characteristic to increase the tolerances of the circuit. The counter can operate for a wide range of input pulse characteristics and circuit parameters. The sum output of the full adder is generated by taking advantage of the folding characteristic of multipeak RTDs. The speed of the full adder is greatly improved because of the parallel processing of the carry output and the sum output. SPICE3 simulations of a quaternary full adder show that the full adder could operate above 1 GHz. Experimental results for breadboarded circuits are presented for a three-valued counter and a ternary full adder.<>

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[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic

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