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[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic最新文献

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On multiple-valued logic functions monotonic with respect to ambiguity 关于多值逻辑函数在歧义性方面的单调性
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186801
K. Nakashima, N. Takagi
{"title":"On multiple-valued logic functions monotonic with respect to ambiguity","authors":"K. Nakashima, N. Takagi","doi":"10.1109/ISMVL.1992.186801","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186801","url":null,"abstract":"The authors define a partial-ordering relation with respect to ambiguity with the greatest element 1/2 and minimal elements 0, 1 in the set of truth values V=(0,1/(p-1),. . ., 1/2,. . ., (p-2)/(p-1), 1), and the p-valued logic functions monotonic with respect to ambiguity, based on this ordering relation. A necessary and sufficient condition for p-valued logic functions to be monotonic with respect to ambiguity is presented along with the proofs, and their logic expressions using unary operators defined in the partial-ordering relation are provided.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114967527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The generalized orthonormal expansion of functions with multiple-valued inputs and some of its applications 多值输入函数的广义正交展开式及其一些应用
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186829
M. Perkowski
{"title":"The generalized orthonormal expansion of functions with multiple-valued inputs and some of its applications","authors":"M. Perkowski","doi":"10.1109/ISMVL.1992.186829","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186829","url":null,"abstract":"The fundamental concept of generalized orthonormal expansion, which generalizes the ring forms of the Shannon expansion to logic with multivalued (MV) inputs and standard trivial functions of an arbitrary number of variables, is introduced. Some applications of the generalized orthonormal expansion are presented, including several generalizations of canonical forms both known from the literature and new. These include a family of canonical tree circuits, which are considered for binary and multivalued input cases. They can be multilevel or flattened to two-level AND-EXOR circuits.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128386064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 57
Residue arithmetic based multiple-valued VLSI image processor 基于残数算法的多值VLSI图像处理器
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186814
M. Honda, M. Kameyama, T. Higuchi
{"title":"Residue arithmetic based multiple-valued VLSI image processor","authors":"M. Honda, M. Kameyama, T. Higuchi","doi":"10.1109/ISMVL.1992.186814","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186814","url":null,"abstract":"An ultra-high-performance VLSI image processor based on a multivalued residue arithmetic circuit is proposed for robot vision. Data communication between the mod m/sub i/ arithmetic units is not necessary in the residue arithmetic system, so that multiple mod m/sub i/ arithmetic units can be on different chips. Therefore, a number of mod m/sub i/ multiplier adders can be implemented on a single VLSI chip based on the modulus-slice concept. Each mod m/sub i/ arithmetic unit can be effectively implemented in parallel using the concept of pseudoprimitive root and multivalued current-mode circuit technology. Thus, the use of parallelism throughout makes the performance very high in comparison with the ordinary binary implementation.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127788162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
An application of the p-valued input, q-kind-valued output logic to the synthesis of the p-valued logical networks p值输入、q类输出逻辑在p值逻辑网络综合中的应用
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186787
T. Haga
{"title":"An application of the p-valued input, q-kind-valued output logic to the synthesis of the p-valued logical networks","authors":"T. Haga","doi":"10.1109/ISMVL.1992.186787","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186787","url":null,"abstract":"The concept of p-valued input, q-kind-valued output logic (2<or=q<or=p, 3<or=p) is proposed. Low-cost p-valued logical networks can be realized by selecting the appropriate value q. The condition for s-(p,q)-logical completeness is derived (0<or=s<or=q). Some relationships between the s and the logical manifold are observed. It is found that the logical manifold increases rather radically as s becomes small.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127404719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High-speed digital circuits for a Josephson computer 约瑟夫森计算机的高速数字电路
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186771
S. Hasuo
{"title":"High-speed digital circuits for a Josephson computer","authors":"S. Hasuo","doi":"10.1109/ISMVL.1992.186771","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186771","url":null,"abstract":"The basic principles behind Josephson digital circuits are reviewed, and the possibility of multivalued logic operation is discussed. Four high-speed Josephson LSIs developed by the authors are described. They are a 4-b microprocessor, a 4-b processor, an 8-b digital signal processor, and 4-kb memory. Their specifications and performances are summarized, and their characteristics are briefly discussed. Preliminary experimental results with a prototype Josephson computer are reported.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125449495","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A proposal of fault-checking fuzzy control 一种故障检测模糊控制方案
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186827
H. Ito, T. Matsubara, T. Kurokawa, Y. Koga
{"title":"A proposal of fault-checking fuzzy control","authors":"H. Ito, T. Matsubara, T. Kurokawa, Y. Koga","doi":"10.1109/ISMVL.1992.186827","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186827","url":null,"abstract":"The effects of faults in fuzzy control systems are examined and are shown not to be negligible. A fault-detecting method that increases the fault tolerance characteristics of fuzzy control systems is proposed. Simulation results show the validity of the proposed fault-checking method for all kinds of faults considered.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126823302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
(n+1)-valued modal implicative semilattices (n+1)值模态蕴涵半格
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186794
M. Frau, A. Figallo
{"title":"(n+1)-valued modal implicative semilattices","authors":"M. Frau, A. Figallo","doi":"10.1109/ISMVL.1992.186794","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186794","url":null,"abstract":"The equational class of (n+1)-valued modal implicative semilattices is defined and investigated. These algebras are the natural generalization of three-valued modal implicative semilattices. A characterization of (n+1)-valued Post algebras is given.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123246766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Autocorrelation techniques for multi-bit decoder PLAs 多比特解码器pla的自相关技术
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186817
R. Tomczuk, D. M. Miller
{"title":"Autocorrelation techniques for multi-bit decoder PLAs","authors":"R. Tomczuk, D. M. Miller","doi":"10.1109/ISMVL.1992.186817","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186817","url":null,"abstract":"The area required by a PLA can be reduced using multibit rather than single-bit input decoders. In such a PLA, the input variables are partitioned into disjoint subsets, each of which is used as the input to a decoder. The output of the decoders, instead of the input signals and their complements, are used in the core of the PLA. The problem of assigned pairs of input variables to two-bit decoders is addressed. Variable pair selection is based on the total autocorrelation of a system of Boolean functions. Preliminary results on the use of autocorrelation coefficients in the assignment of triples of variables to decoders are also presented.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115856967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Multiple-valued programmable logic array minimization by simulated annealing 多值可编程逻辑阵列的模拟退火最小化
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186779
G. Dueck, Robert C. Earle, P. Tirumalai, J. T. Butler
{"title":"Multiple-valued programmable logic array minimization by simulated annealing","authors":"G. Dueck, Robert C. Earle, P. Tirumalai, J. T. Butler","doi":"10.1109/ISMVL.1992.186779","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186779","url":null,"abstract":"A solution to the minimization problem for multivalued programmable logic arrays (PLAs) that uses simulated annealing is proposed. The algorithm accepts a sum-of-products expression and divides and recombines the product terms, gradually progressing toward a minimal solution. The input expression can be used-specified or produced by another heuristic. The technique manipulates product terms directly, breaking them up and joining them in different ways while reducing the total number of product terms. Two mechanisms for recombining product terms are shown, and the results are compared with those for presently known heuristics. A benefit of simulated annealing is that improved solutions can be achieved by increasing computation time.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116766218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Design of a multiple-valued rule-programmable matching VLSI chip for real-time rule-based systems 基于实时规则系统的多值规则可编程匹配VLSI芯片设计
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186806
T. Hanyu, K. Takeda, T. Higuchi
{"title":"Design of a multiple-valued rule-programmable matching VLSI chip for real-time rule-based systems","authors":"T. Hanyu, K. Takeda, T. Higuchi","doi":"10.1109/ISMVL.1992.186806","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186806","url":null,"abstract":"A multivalued VLSI processor design for fully parallel pattern matching is presented. It can be applied to real-time rule-based systems with large knowledge bases which are programmable. One-digit pattern matching based on direct multivalued encoding of each attribute can be described by only a programmable delta literal. Moreover, the literal circuit can be easily implemented using two floating-gate MOS devices whose threshold voltages are controllable. The inference time of an eight-valued matching processor with 256 rules and conflict resolution circuits is estimated at about 360 ns, and the chip area is reduced to about 10% of that of the equivalent binary implementation.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114678236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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