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[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic最新文献

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Inverted pendulum controlled circuit using fuzzy state memory-with voltage mode fuzzy state memory 采用模糊状态记忆的倒立摆控制电路——带电压型模糊状态记忆
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186826
Y. Shirai, F. Ueno, T. Inoue, Motohiro Inoue, Kouji Tasaki
{"title":"Inverted pendulum controlled circuit using fuzzy state memory-with voltage mode fuzzy state memory","authors":"Y. Shirai, F. Ueno, T. Inoue, Motohiro Inoue, Kouji Tasaki","doi":"10.1109/ISMVL.1992.186826","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186826","url":null,"abstract":"A fuzzy hardware system composed of a fuzzy state memory is presented. The fuzzy inference processes are not needed by this fuzzy hardware system, so the hardware system can be constructed simply. A prototype of the hardware fuzzy state memory is implemented using operational amplifiers. As an example application, an attempt is made to control the inverted pendulum using fuzzy state memories.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114591773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimization of multiple-valued AND-EXOR expressions using multiple-place decision diagrams 利用多位置决策图优化多值AND-EXOR表达式
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186830
Tsutomu Sasao
{"title":"Optimization of multiple-valued AND-EXOR expressions using multiple-place decision diagrams","authors":"Tsutomu Sasao","doi":"10.1109/ISMVL.1992.186830","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186830","url":null,"abstract":"The author presents an optimization method for pseudo-Kronecker expressions of p-valued-input, two-valued-output functions using multiplace decision diagrams for p=2 and p=4. A conventional method using extended truth tables requires memory of O(3/sup n/) to simplify an n-variable expression, and is only practical for functions of up to n=14 variables when p=2. The method presented utilizes and can optimize considerably larger problems. Experimental results for up to n=39 variables are shown.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116071577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 40
Some remarks on Fourier transform and differential operators for digital functions 数字函数的傅里叶变换和微分算子
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186818
R. Stankovic
{"title":"Some remarks on Fourier transform and differential operators for digital functions","authors":"R. Stankovic","doi":"10.1109/ISMVL.1992.186818","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186818","url":null,"abstract":"A Fourier-like transform suitable for application to digital functions is considered, and the difference operators for these functions are discussed. Special attention is focused to the relationship between the Fourier transform of a function and the Fourier transform of its difference relative to a particular variable. Using the transform introduced, a polynomial expansion for digital functions is suggested.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122764115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
A meaningful infinite-values switching function-fuzzy threshold function and its application to process control 一个有意义的无穷值切换函数——模糊阈值函数及其在过程控制中的应用
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186825
Yoshinori Yamamoto
{"title":"A meaningful infinite-values switching function-fuzzy threshold function and its application to process control","authors":"Yoshinori Yamamoto","doi":"10.1109/ISMVL.1992.186825","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186825","url":null,"abstract":"The author previously defined (1991) an infinite-valued switching function, called the fuzzy threshold function, on an extended logic system and showed that process control using the fuzzy threshold functions is 50 times faster than fuzzy control by the MAX-MIN-CG (center of gravity) method. The procedure of process control using the fuzzy threshold functions is discussed in terms of multivalued logic to show the problems remaining. The method is compared with the simplified fuzzy control method.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126302422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design of a multiple-valued VLSI processor for digital control 用于数字控制的多值VLSI处理器的设计
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186813
Katsuhiko Shimabukuro, M. Kameyama, T. Higuchi
{"title":"Design of a multiple-valued VLSI processor for digital control","authors":"Katsuhiko Shimabukuro, M. Kameyama, T. Higuchi","doi":"10.1109/ISMVL.1992.186813","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186813","url":null,"abstract":"A high-performance parallel, multivalued VLSI processor using the radix-2 signed-digit number system is proposed. Multivalued bidirectional current-mode technology is used not only in the high-speed small-sized arithmetic circuits, but also in reducing the number of connections. Compactness and high-speed operation enhance the performance of the processor chip under the chip size limitation. The processor has been developed for real-time digital control, where the performance is evaluated by delay time. A performance estimation using SPICE simulators shows that the delay time of the processor for operations such as matrix multiplication is greatly reduced in comparison to a conventional binary processor.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129854846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Efficient derivation of Reed-Muller expansions in multiple-valued logic systems 多值逻辑系统中Reed-Muller展开式的有效推导
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186828
B. Harking, C. Moraga
{"title":"Efficient derivation of Reed-Muller expansions in multiple-valued logic systems","authors":"B. Harking, C. Moraga","doi":"10.1109/ISMVL.1992.186828","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186828","url":null,"abstract":"A method for computing Reed-Muller expansions for multivalued logic functions is presented. All coefficients are constructed directly without the use of matrix multiplication. Due to the high degree of parallelism, the complexity of the algorithm in terms of the area-time tradeoff (AT/sup 2/) yields a better result than a butterfly algorithm does.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130154482","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 32
On a logic based on fuzzy modalities 基于模糊模态的逻辑
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186831
A. Nakamura
{"title":"On a logic based on fuzzy modalities","authors":"A. Nakamura","doi":"10.1109/ISMVL.1992.186831","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186831","url":null,"abstract":"Starting from the author's previous work (1991) on the S5-modal fuzzy logic, a modal fuzzy logic based on L.A. Zadeh's (1971) similarity relation is proposed. Several properties similar to that in the rough set are shown. A decision procedure for this logic is given, using a rectangle method based on the tableau method. Remarks on axiomatization and relationships to rough quantifiers are given.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122012848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A superconducting ternary systolic array processor 一种超导三元收缩阵列处理机
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186772
M. Morisue, Fu-Qiang Li
{"title":"A superconducting ternary systolic array processor","authors":"M. Morisue, Fu-Qiang Li","doi":"10.1109/ISMVL.1992.186772","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186772","url":null,"abstract":"A novel Josephson ternary systolic array processor for multiplication is proposed. The processor consists of two kinds of cells, one of which performs a partial multiplication and the other two functions of multiplication and addition simultaneously. The advantages of the processor are its very simple construction with a small number of SQUID gates and its very-high-speed operation and ultralow power dissipation. Information flows between cells in a pipeline fashion so that high performance can be achieved. The principle of the processor is described in detail, and simulation results for the multiplication of 2 trit*2 trit are presented. The results show that the pipeline operation can be executed in a cycle time of 450 ps.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126826979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Area-efficient implication circuits for very dense Lukasiewicz logic arrays 用于非常密集的Lukasiewicz逻辑阵列的面积高效隐含电路
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186808
J. W. Mills
{"title":"Area-efficient implication circuits for very dense Lukasiewicz logic arrays","authors":"J. W. Mills","doi":"10.1109/ISMVL.1992.186808","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186808","url":null,"abstract":"A one-diode circuit for negated implication is derived from a 12-transistor Lukasiewicz implication circuit. The derivation also yields an adjustable three-transistor implication circuit with maximum error less than 1% of full scale. Two Lukasiewicz logic arrays are proposed that use area-efficient implementations of the one-diode and three-transistor implication circuits. The very dense diode-tower LLA contains 36000 implications in an area that previously held 92 implications; the three-transistor LLA contains 1990 implications. Both LLAs double the number of inputs per pin on the IC package. Very dense LLAs make LLA-based architectures practical. As an example, an LLA retina that detects edges in 15 ns is described.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"22 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132836015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Bi-CMOS current mode multiple valued logic circuits with 1.5 V supply voltage 双cmos电流模式多值逻辑电路，1.5 V电源电压
[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic Pub Date : 1992-05-27 DOI: 10.1109/ISMVL.1992.186798
K. Taniguchi, M. Sasaki, Y. Ogata, F. Ueno, T. Inoue
{"title":"Bi-CMOS current mode multiple valued logic circuits with 1.5 V supply voltage","authors":"K. Taniguchi, M. Sasaki, Y. Ogata, F. Ueno, T. Inoue","doi":"10.1109/ISMVL.1992.186798","DOIUrl":"https://doi.org/10.1109/ISMVL.1992.186798","url":null,"abstract":"A BiCMOS current-mode multivalued logic circuit with 1.5-V supply voltage is presented. The circuit is composed of a current mirror, threshold detector, and current source. It has high accuracy, high speed, and high density, as well as low supply voltage, so that it is possible to realize a high-radix multivalued logic circuit. As another application of the proposed circuit, a singleton fuzzy controller that operates with high speed and high accuracy is given.<<ETX>>","PeriodicalId":127091,"journal":{"name":"[1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic","volume":"18 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114033693","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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