Multiple-valued programmable logic array minimization by simulated annealing

Abstract

A solution to the minimization problem for multivalued programmable logic arrays (PLAs) that uses simulated annealing is proposed. The algorithm accepts a sum-of-products expression and divides and recombines the product terms, gradually progressing toward a minimal solution. The input expression can be used-specified or produced by another heuristic. The technique manipulates product terms directly, breaking them up and joining them in different ways while reducing the total number of product terms. Two mechanisms for recombining product terms are shown, and the results are compared with those for presently known heuristics. A benefit of simulated annealing is that improved solutions can be achieved by increasing computation time.<>