{"title":"Packaging technology for the NEC ACOS System 3900","authors":"M. Yamada, M. Nishiyama, T. Tokaichi, M. Okano","doi":"10.1109/ECTC.1992.204288","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204288","url":null,"abstract":"The packaging technologies adopted in the NEC ACOS System 3900 are described. A new high-density surface-mount technology was adopted to further reduce the distance between the LSI chips, based on the high-speed LSI technology and the LSI multichip packaging technology used in the supercomputer SX-3. The system uses as a processor a multichip package (MCP) which can mount up to 100 VLSIs with a maximum of 20000 gates per VLSI and 70-ps delay time per gate. To connect MCPs over the shortest distance, MCPs are mounted on both sides of single 42-layer printed wiring board (PWB). A new surface-mount zero insertion force (ZIF) connector has been developed to implement this double mounting of MCPs. This ZIF connector is a high-density surface-mount connector having 9440 contacts on one side of the pad arranged in a 2.54-mm staggered grid on the PWB surface. This makes it possible to connect the MCP and the PWB at once with high reliability. The main memory unit is described.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133764027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Component management: evolution from traffic cops to value-added function","authors":"R.A. Friedenson, W.R. Barrett, L.J. Kiszka","doi":"10.1109/ECTC.1992.204296","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204296","url":null,"abstract":"The authors describe the implementation of a component management program that meets design, manufacturing, and end-customer needs. Design sees shorter qualification intervals, lower qualification costs, faster manufacturing ramp-up, and fewer calls for component substitution approval. Manufacturing sees a large reduction in active components, higher incoming quality, elimination of incoming inspection, fewer suppliers to deal with, and fewer supply crises. The end customer sees better circuit pack reliability and faster product delivery.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"323 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134055234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Silicon field emission triodes and diodes","authors":"G.W. Jones, C. Sune, H. Gray","doi":"10.1109/ECTC.1992.204297","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204297","url":null,"abstract":"Uniform, sharp point and wedge type field emitter arrays (FEAs) were fabricated by using orientation-dependent etching and reoxidation sharpening techniques. This fabrication process results in very sharp and reproducible silicon field emitters which have yielded electron emission currents exceeding 20 mu A/tip for the pointlike structures with under 90-V turn-on extraction voltages. Collected currents of 5 mu A were obtained on wedge arrays at 300 V. Arrays of up to 30000 pyramidal point type emitters have been fabricated. Arrays of these devices have potential applicability to microvacuum tube transistors when sealed in microvacuum cavity arrays. These devices possess potential applicability to high-temperature transistors and diodes with high kW power at high frequencies (>1 GHz) and to high-brightness, high-resolution displays.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133645924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A shape optimal design methodology for packaging design","authors":"S. Rajan, B. Nagaraj, M. Mahalingam","doi":"10.1109/ECTC.1992.204289","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204289","url":null,"abstract":"The hybrid natural shape optimal design approach is used along with a nonlinear programming (NLP) technique to find the optimal shapes of electronic packaging components. The design problems are formulated as min-max problems, and linear and materially nonlinear finite element analyses provide the function values. The applicability of the developed methodology is illustrated using a design example that deals with the packaging design of a plastic pad array carrier digital package. The results indicate that the methodology can be used as an effective way of evaluating different design alternatives or as a way of refining existing designs. The methodology and the tool set considered here have the potential to reduce the design cycle time in new product development efforts.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133145953","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Practical transmission line analysis (striplines)","authors":"R. E. Canright","doi":"10.1109/ECTC.1992.204235","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204235","url":null,"abstract":"It is demonstrated that a simple formula can produce essentially the same results as a more costly finite element method analysis for dual stripline characteristic impedance. This formula can analyze the effects of undercut in both dual stripline (offset stripline) and in conventional stripline. Because the simple, closed-form solution uses little central processor unit time, it is ideal for embedding into a computer-aided design program that designs transmission lines.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129379731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Factors affecting fiber optic connector pluggability","authors":"O. Paz, H. B. Schwartz, D. E. Smith, E. B. Flint","doi":"10.1109/ECTC.1992.204270","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204270","url":null,"abstract":"A duplex fiber-optic connector which mates to a transmitter receiver module is described, and an analysis of the factors affecting the ability to plug the connector into the module is presented. The analysis presented includes a detailed model predicting the force required to insert the ferrule into the bore, complemented by a measurement technique in which the plug force effects of controlled ferrule-to-bore offset are characterized. The results indicate several parameters of the connector design, related to both suspension mechanics and dimensional constraints, which affect the force required to plug the ferrule into the bore. One of the primary factors identified is the radial force generated by the connector spring, resulting from its axial compression, for which a unique measuring apparatus was developed. The effect of the radial force on connector plugging was studied through a combination of spring and connector pluggability measurements.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123832940","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Jackson, E. B. Flint, M. Cina, D. Lacey, J. Trewhella, T. Caulfield, S. Sibley
{"title":"A compact multichannel transceiver module using planar-processed optical waveguides and flip-chip optoelectronic components","authors":"K. Jackson, E. B. Flint, M. Cina, D. Lacey, J. Trewhella, T. Caulfield, S. Sibley","doi":"10.1109/ECTC.1992.204190","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204190","url":null,"abstract":"A compact, planar-processed package using flip-chip, self-aligned optoelectronic components is described. The packaging concepts are compatible with existing high-speed, high-density electronic materials and processes and therefore have the potential for high-volume, low-cost manufacturing. The concepts are demonstrated using a four-channel transceiver module utilizing planar-processed optical waveguides and flip-chip optoelectronic components. An overview of the package is presented, and the substrate, the optoelectronic chip alignment, the module connector, and link tests are described.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129240551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design driven LED degradation model for opto-isolators","authors":"J. Keller","doi":"10.1109/ECTC.1992.204238","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204238","url":null,"abstract":"Results from a matrix of temperature and current stress testing of opto-isolator LEDs (light emitting diodes) are presented. Extensive statistical analysis of this large database is shown along with the method used to define the shape of the LED degradation curves. A basic equation was developed based on the Arrhenius model for temperature-dependent effects and on the author's experience with the physics of LED degradation. Also shown are the results of multiple regression analysis of the plotted points and how they were used to resolve the constants associated with this equation. In addition, explanations are presented of unusual findings and their causes. This equation can be used by circuit designers to predict LED degradation for any time, operating current, and ambient temperature. A graph of percent degradation versus time is shown which was derived by plugging into the equation typical use currents and temperatures. A further refinement is presented that describes degradation in terms of a six-sigma distribution, giving the ability to encompass variations encountered during production.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127999597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
L. Fox, C. Davidson, S. Hansen, K. Brown, A. Ościłowski
{"title":"High-performance tape package","authors":"L. Fox, C. Davidson, S. Hansen, K. Brown, A. Ościłowski","doi":"10.1109/ECTC.1992.204244","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204244","url":null,"abstract":"A high-pincount, high-power TAB (tape automated bonding) to board VLSI chip package is described. The package consists of a protective ceramic clamshell enclosing a TAB chip with 332 leads at 125 mu m ILB (inner lead bond) pitch extending uninterrupted through the ceramic enclosure to the 0.3-mm pitch OLB (outer lead bond) zone configured for reflow soldering. The package body is clamped to the printed wiring board substrate by a spring-loaded heatsink providing good thermal conductance through a low-pressure separable interface. A 70-mm single site slide carrier tape format is employed to facilitate package assembly from ILB, die attach, clamshell bonding, through test and burn-in, and finally excise and leadform for OLB. A number of rigorous tests were used to qualify the package for use in the VAX4000/300.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121176784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Development of high-reliability epoxy molding compounds for surface-mount devices","authors":"N. Mogi, H. Yasuda","doi":"10.1109/ECTC.1992.204331","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204331","url":null,"abstract":"The authors have researched and developed new epoxy molding compounds for surface mount devices. In the compound design, physical properties were established by examining the mechanism of cracking with thermal stress generated during soldering. In the compound development, conventional resin systems were reviewed to obtain significant improvements of the physical properties. As a result, low water absorption, low thermal expansion, and high strength were attained by adopting the biphenyl epoxy resin which has very low melt viscosity and high filler loading capability compared with conventional ortho-cresol-novolak epoxy resin. For the phenolic hardener, it is found that low flexural modulus, high adhesion, and low moisture absorption are attained by adopting an aromatic and alicyclic structure instead of a methyl chain in the frame of the conventional phenol novolak.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124461881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}