{"title":"用于NEC ACOS System 3900的封装技术","authors":"M. Yamada, M. Nishiyama, T. Tokaichi, M. Okano","doi":"10.1109/ECTC.1992.204288","DOIUrl":null,"url":null,"abstract":"The packaging technologies adopted in the NEC ACOS System 3900 are described. A new high-density surface-mount technology was adopted to further reduce the distance between the LSI chips, based on the high-speed LSI technology and the LSI multichip packaging technology used in the supercomputer SX-3. The system uses as a processor a multichip package (MCP) which can mount up to 100 VLSIs with a maximum of 20000 gates per VLSI and 70-ps delay time per gate. To connect MCPs over the shortest distance, MCPs are mounted on both sides of single 42-layer printed wiring board (PWB). A new surface-mount zero insertion force (ZIF) connector has been developed to implement this double mounting of MCPs. This ZIF connector is a high-density surface-mount connector having 9440 contacts on one side of the pad arranged in a 2.54-mm staggered grid on the PWB surface. This makes it possible to connect the MCP and the PWB at once with high reliability. The main memory unit is described.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"81 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Packaging technology for the NEC ACOS System 3900\",\"authors\":\"M. Yamada, M. Nishiyama, T. Tokaichi, M. Okano\",\"doi\":\"10.1109/ECTC.1992.204288\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The packaging technologies adopted in the NEC ACOS System 3900 are described. A new high-density surface-mount technology was adopted to further reduce the distance between the LSI chips, based on the high-speed LSI technology and the LSI multichip packaging technology used in the supercomputer SX-3. The system uses as a processor a multichip package (MCP) which can mount up to 100 VLSIs with a maximum of 20000 gates per VLSI and 70-ps delay time per gate. To connect MCPs over the shortest distance, MCPs are mounted on both sides of single 42-layer printed wiring board (PWB). A new surface-mount zero insertion force (ZIF) connector has been developed to implement this double mounting of MCPs. This ZIF connector is a high-density surface-mount connector having 9440 contacts on one side of the pad arranged in a 2.54-mm staggered grid on the PWB surface. This makes it possible to connect the MCP and the PWB at once with high reliability. The main memory unit is described.<<ETX>>\",\"PeriodicalId\":125270,\"journal\":{\"name\":\"1992 Proceedings 42nd Electronic Components & Technology Conference\",\"volume\":\"81 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1992 Proceedings 42nd Electronic Components & Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.1992.204288\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1992 Proceedings 42nd Electronic Components & Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1992.204288","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
摘要
介绍了NEC ACOS System 3900采用的封装技术。基于高速LSI技术和超级计算机SX-3中使用的LSI多芯片封装技术，采用了一种新的高密度表面贴装技术，进一步缩短了LSI芯片之间的距离。该系统使用多芯片封装(MCP)作为处理器，可安装多达100个VLSI，每个VLSI最多有20000个门，每个门的延迟时间为70 ps。为了以最短的距离连接mcp, mcp安装在单个42层印刷线路板(PWB)的两侧。一种新的表面贴装零插入力(ZIF)连接器已经开发出来，以实现这种双安装的mcp。这种ZIF连接器是一种高密度表面贴装连接器，在衬垫的一侧有9440个触点，排列在PWB表面上的2.54 mm交错网格中。这使得MCP和PWB同时连接成为可能，并且具有高可靠性。描述主存单元。>
The packaging technologies adopted in the NEC ACOS System 3900 are described. A new high-density surface-mount technology was adopted to further reduce the distance between the LSI chips, based on the high-speed LSI technology and the LSI multichip packaging technology used in the supercomputer SX-3. The system uses as a processor a multichip package (MCP) which can mount up to 100 VLSIs with a maximum of 20000 gates per VLSI and 70-ps delay time per gate. To connect MCPs over the shortest distance, MCPs are mounted on both sides of single 42-layer printed wiring board (PWB). A new surface-mount zero insertion force (ZIF) connector has been developed to implement this double mounting of MCPs. This ZIF connector is a high-density surface-mount connector having 9440 contacts on one side of the pad arranged in a 2.54-mm staggered grid on the PWB surface. This makes it possible to connect the MCP and the PWB at once with high reliability. The main memory unit is described.<>
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