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1992 Proceedings 42nd Electronic Components & Technology Conference最新文献

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Percolation constraints in the use of conductor-filled polymers for interconnects 使用导体填充聚合物进行互连时的渗透限制
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204249
G. Ruschau, S. Yoshikawa, R. Newnham
{"title":"Percolation constraints in the use of conductor-filled polymers for interconnects","authors":"G. Ruschau, S. Yoshikawa, R. Newnham","doi":"10.1109/ECTC.1992.204249","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204249","url":null,"abstract":"The properties of composite systems are understood in terms of percolation phenomena; when a sufficient amount of conductive filler is loaded into an insulating polymer matrix, the composite transforms from an insulator to a conductor, the result of continuous linkages of filler particles. The critical volume fraction at which this transformation occurs, V/sub c/, is the focus of the investigation reported. The concentration is on the properties of some silver-filled silicon rubber composites, and it is shown how the artificial percolation restrictions affect both the critical volume fraction and the resistivity of the composite. A computer simulation of the two-dimensional case shows that these restrictions affect V/sub c/ in a predictable manner. An empirical method of predicting V/sub c/ for non-restricted systems is presented.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"24 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129738554","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Effects of die pad anchoring on package interfacial integrity 模垫锚定对封装界面完整性的影响
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204317
L. Nguyen, M. Michael
{"title":"Effects of die pad anchoring on package interfacial integrity","authors":"L. Nguyen, M. Michael","doi":"10.1109/ECTC.1992.204317","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204317","url":null,"abstract":"The effects of anchoring the die pad to the epoxy molding compound to improve the package interfacial integrity are addressed. The designs considered varied from simple circular holes dispersed at the four corners of the die pad to longer slots distributed along the periphery of the die. 3-D finite element models were constructed to simulate the residual stress profiles within the various molded configurations. Interfacial delamination was artificially induced at selected locations of the die pad by nodal decoupling. The simulation results were compared with acoustic tomograph scans of the packages to assess any correlation between the predicted high stress profiles and the extent of delamination observed. The introduction of an anchor in the die pad provided various degrees of stress relief to the silicon die, depending on the anchor geometry. Although the effects were localized, the ensuing stress reduction was sufficient in some cases to avoid the initiation of delamination. Finite-element results also pinpointed other areas of high stress concentration, which acted as potential sites where delamination could initiate and propagate. Based on these results, design criteria were formulated to dictate the most efficient pattern of holes and slots that would provide the best anchoring properties to the molding compound.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"41 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120918769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Equations for selection of cost-efficient interconnection designs 成本效益互连设计选择公式
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204175
G. Messner, W. Smit
{"title":"Equations for selection of cost-efficient interconnection designs","authors":"G. Messner, W. Smit","doi":"10.1109/ECTC.1992.204175","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204175","url":null,"abstract":"Attempts to extend the utility of the price/density diagram for interconnection substrates by deriving a number of theoretical relationships for analyzing the costs of interconnections in a more general way, and a number of equations are given which relate the cost of interconnections to their density. It is shown that there exists a set of 'saddle-shaped' cost/density relationships for each technology selected for the manufacture of the interconnecting substrates. Practical application of these equations is illustrated by empirical results confirming their applicability in a realistic design environment. A method for calculating the effects of yields of a selected manufacturing processes on the interconnection costs is shown. It is demonstrated that this method can be extended to provide information about the economically optimal design of conductor widths on interconnecting substrates. The authors present an example showing the application of the derived equations to the problem of packaging a CPU with 6*10/sup 6/ gates, using the most efficient interconnection solution for the entire system, including chips, MCMs (multichip modules), and motherboards.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"188 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124163972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Microwave characterisation of microstrip lines and spiral inductors in MCM-D technology MCM-D技术中微带线和螺旋电感的微波特性
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204301
R. G. Arnold, D. Pedder
{"title":"Microwave characterisation of microstrip lines and spiral inductors in MCM-D technology","authors":"R. G. Arnold, D. Pedder","doi":"10.1109/ECTC.1992.204301","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204301","url":null,"abstract":"MCM-D (multichip module-D) technology comprising a four-level metallization, aluminum-polyimide structure defined on a silicon substrate is considered. A dedicated microwave characterization layout was designed and implemented, which included a series of microstrip lines, spiral inductors, microstrip coupling structures, ring resonators, and microwave calibration structures. Analog measurements of these structures were then carried out using RF-on-wafer methods at frequencies from 0.5 to 20 GHz. Equivalent circuit models were derived which gave a close fit to the experimental measurements, and a range of transmission line and spiral inductor components was characterized. Useful analog transmission line behavior was indicated for 10-mm line lengths to 10 GHz, while inductors were measured with primary inductances approaching 10 nH with useful Q values in the 1 -3-GHz region. Layout rules for low crosstalk were also devised. The lower metallization resistance and increased dielectric separation from the silicon substrate resulted in improved performance for these MCM-D inductors in comparison with on-chip inductors of comparable inductance.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133734499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 43
Packaging of high-density fiber/laser modules using passive alignment techniques 采用无源对准技术封装高密度光纤/激光模块
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204191
M.S. Cohen, M. Cina, E. Bassous, M. Oprysko, J. Speidell, F. J. Canora, M. DeFranza
{"title":"Packaging of high-density fiber/laser modules using passive alignment techniques","authors":"M.S. Cohen, M. Cina, E. Bassous, M. Oprysko, J. Speidell, F. J. Canora, M. DeFranza","doi":"10.1109/ECTC.1992.204191","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204191","url":null,"abstract":"A novel method for packaging a laser-fiber module is explored in which the critical laser-fiber alignment is carried out not with the usual active means, i.e., with the laser activated, but by a passive method based on the registration principles of photolithography. The novel method relies on an index scheme in which fiducial marks are lithographically placed on the laser chip and on a fiber carrier. At 850 nm, using the index technique with cleaved multimode fibers, it has been possible to achieve the same laser-fiber coupling efficiency as attained by active alignment; with cleaved single-mode fibers about 80% of the active-alignment coupling efficiency was achieved. Details of the novel index-alignment method are discussed, and a brief description of an improved computer-controlled version of the apparatus is given.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116775416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 40
High-density interconnect substrate with low thermal resistance for GaAs LSI multichip modules 用于GaAs LSI多芯片模块的低热阻高密度互连衬底
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204324
A. Miki, M. Nishiguchi, H. Nishizawa
{"title":"High-density interconnect substrate with low thermal resistance for GaAs LSI multichip modules","authors":"A. Miki, M. Nishiguchi, H. Nishizawa","doi":"10.1109/ECTC.1992.204324","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204324","url":null,"abstract":"A copper-polyimide multilayer sunbstrate developed for high-density and high-speed application was confirmed to have a great advantage for high power-dissipating GaAs LSI chips through thermal resistance evaluation. 5-mm-square GaAs specimens and the authors' original chip surface temperature measurement technology based on the diode drop method were utilized to examine the thermal resistance. In spite of the low thermal conductivity of the polyimide, thermal vias formed in the substrate were most effective in keeping the surface temperature of LSI low. The expectedly low junction-to-case thermal resistance of 4.8 degrees C/W was obtained for the substrate having 2.6% thermal vias in the die-attach area. Face down bonded specimens by flip chip interconnect technology, which is the most suitable assembly technique for high-speed multichip modules, were also investigated. Consequently, thermal vias combined with thermal bumps were clearly proved to have a sufficiently positive influence upon decreasing the thermal resistance.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116938226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Repair of thin film wiring with laser-assisted processes 用激光辅助工艺修复薄膜布线
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204290
T. Wassick
{"title":"Repair of thin film wiring with laser-assisted processes","authors":"T. Wassick","doi":"10.1109/ECTC.1992.204290","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204290","url":null,"abstract":"The ability to repair defective circuit elements on the high end packaging components being built by IBM for the System/390 is important in meeting yield and reliability targets. A number of laser-based technologies have been developed at IBM, establishing the capability to modify fine line circuit patterns on a range of packaging materials. The ability to control the laser/material interaction with the ability to successfully modify the circuit without adversely affecting the integrity of the dielectric is discussed. Removal of unwanted conductors is done with a computer-controlled, excimer-laser micromachining system operating at 308 nm. New conductor segments are created through the laser chemical vapor deposition of gold from the pyrolytic decomposition of dimethyl-Au-trifluoroacetylacetonate. The applications of these techniques to IBM's thin film packaging are described, with specific focus on the two technologies introduced for the manufacture of high end, thin film packaging products.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128598319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
New analytical study for popcorn phenomenon 爆米花现象的新分析研究
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204333
H. Kimura, S. Ohizumi, T. Nishioka, M. Nakao, M. Harada
{"title":"New analytical study for popcorn phenomenon","authors":"H. Kimura, S. Ohizumi, T. Nishioka, M. Nakao, M. Harada","doi":"10.1109/ECTC.1992.204333","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204333","url":null,"abstract":"Package crack during mounting on the printed circuits is a major concern in package design and material development by engineers. This package crack (the so-called popcorn phenomenon) is caused by evaporation and expansion of absorbed moisture in the package at the temperature of reflow soldering for mounting on printed circuits. This package crack has been assumed to start from delamination between the encapsulant and the leadframe. But a new crack mode was found starting from the delamination of the silver paste. In order to evaluate this new crack mode, the following items were investigated: (1) the mechanism of package cracking, (2) stress, generated during the soldering process, and (3) the design of physical properties of a molding compound that has resistance of the new crack mode. Using these studies the authors developed a new molding compound that has excellent resistance to the new crack mode.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127888729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Printing encapsulation systems (PES) of advanced multichip module and COB device 先进多芯片模块和COB器件的印刷封装系统(PES)
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204294
A. Okuno, K. Nagai, N. Oyama, T. Hashimoto, T. Onishi, S. Wakamoto, K. Masui
{"title":"Printing encapsulation systems (PES) of advanced multichip module and COB device","authors":"A. Okuno, K. Nagai, N. Oyama, T. Hashimoto, T. Onishi, S. Wakamoto, K. Masui","doi":"10.1109/ECTC.1992.204294","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204294","url":null,"abstract":"Continuous study of a printing encapsulation system (PES) for multichip module and COB (chip on board) led to optimal encapsulation resin properties. The authors have developed a printing encapsulation system (PES) of high reliability and quality, free of voids, and a thin and desirable encapsulation resin shape for an advanced COB device. Using this PES, it was possible to solve the problems in the printing encapsulation process to keep control of resin viscosity and other properties at open lid storage. It was possible to determine the suitable thixotropic property index. The authors developed a void-free process system which avoids the effects of heat shock and achieves moisture resistance improvement, and a short time curing system.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116717520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Ceramic greensheet technology for glass-ceramic/copper multilevel substrates (ES9000 system) 用于玻璃陶瓷/铜多层基板的陶瓷绿片技术(ES9000系统)
1992 Proceedings 42nd Electronic Components & Technology Conference Pub Date : 1992-05-18 DOI: 10.1109/ECTC.1992.204276
R. Nufer
{"title":"Ceramic greensheet technology for glass-ceramic/copper multilevel substrates (ES9000 system)","authors":"R. Nufer","doi":"10.1109/ECTC.1992.204276","DOIUrl":"https://doi.org/10.1109/ECTC.1992.204276","url":null,"abstract":"IBM's high end computers, models 820 and 900 of the ES9000 systems, use one of the most advanced substrates to achieve their high ultimate performance. These substrates are fabricated using a multilayer ceramic (MLC) process based on a specially developed ceramic green sheet. The author discusses the development of the green sheet, emphasizing the importance of the polymeric binder system that provides a very stable sheet insuring the alignment of millions of vias and internal interconnections. Green sheet binder formulations are reviewed, illustrating the contribution of the solvents in controlling sheet microporosity. The continuous casting process used in sheet preparation, slurry rheology, and green sheet properties is described.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115157643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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