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China., 1991 International Conference on Circuits and Systems最新文献

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An alternative coherent demodulation scheme for BPSK signals-signal transform method BPSK信号相干解调的一种替代方案
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184385
Feng Suo-Chun
{"title":"An alternative coherent demodulation scheme for BPSK signals-signal transform method","authors":"Feng Suo-Chun","doi":"10.1109/CICCAS.1991.184385","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184385","url":null,"abstract":"The author proposes an alternative coherent demodulation scheme for BPSK signals which is called the 'signal transform method'. The method is proceeded on the principle that before the demodulation the BPSK signals are translated into other signal waveforms which can be simply demodulated. In the scheme, the author suggests two new coherent demodulation techniques for BPSK signals which get round the phase ambiguity of recovered carriers as exist in conventional coherent demodulation techniques and simultaneously give the timing clock signals for symbol decisions. The circuitry configurations suggested here are relatively simple. The transformed signals can also be differentially detected with nonredundant error correction, and thus improving the system performance.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126141434","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Super-Gaussian window function and its applications 超高斯窗函数及其应用
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184426
Zhang Hui, Zhao Guiliang, Dejung Wang
{"title":"Super-Gaussian window function and its applications","authors":"Zhang Hui, Zhao Guiliang, Dejung Wang","doi":"10.1109/CICCAS.1991.184426","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184426","url":null,"abstract":"Describes a new window function which is called Super-Gaussian window function. The most simple window function is rectangular window, it causes sharp discontinuities at the window edges and gives rise to the ringing in the transform. On the other hand, one can use an artificial window function with rounded corners that gradually reduces the function to zero at the endpoints. The details of the characteristics of the Super-Gaussian (SG) window function and some applications are discussed. It is shown that the SG function is a very good window function and easy to use.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126151420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
AISCE: a layout synthesis system for ASIC design AISCE:用于ASIC设计的版图综合系统
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184377
Hong Li, Wei Li
{"title":"AISCE: a layout synthesis system for ASIC design","authors":"Hong Li, Wei Li","doi":"10.1109/CICCAS.1991.184377","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184377","url":null,"abstract":"This paper describes a layout synthesis system called AISCE. The system accepts structural or logic hardware design specification and creates a physical layout of the integrated circuit automatically. AISCE contains several parts: schematic capture system, netlist compiler, module generators for data and control paths, tools for floorplanning, placement and routing, simulators and verifiers, etc. They are all integrated into one design framework. Experimental results show that AISCE is an efficient and promising system.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126178846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An effective algorithm for test application 一种有效的测试应用算法
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184444
Z. Zijian, Chen Junliang
{"title":"An effective algorithm for test application","authors":"Z. Zijian, Chen Junliang","doi":"10.1109/CICCAS.1991.184444","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184444","url":null,"abstract":"DTS (dynamic test sequence) algorithm the simplification and extension of adaptive experiment, is developed as an engineering approach for locating faults more efficiently at PCB functional testing level. The application in a practical ATE system is presented in detail. Comparison with the arbitrary test application shows its advantages.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122663339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A new development of failure bound method-diagnosable conditions with application for analog systems 故障界方法的新发展——可诊断条件及其在模拟系统中的应用
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184396
Shiliang Zhou, Zheng-Hui Lin
{"title":"A new development of failure bound method-diagnosable conditions with application for analog systems","authors":"Shiliang Zhou, Zheng-Hui Lin","doi":"10.1109/CICCAS.1991.184396","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184396","url":null,"abstract":"The failure bound method for analog fault diagnosis is developed in this paper. The necessary and sufficient condition for diagnosability of a faulty set as an analytic condition is derived. Based on these conditions another form of pseudo circuit is created, so that the diagnosis process can be continued with insufficient test points. Furthermore, a graphical condition for the diagnosability of a faulty set is also presented. Finally, a diagnosis algorithm is proposed with an example.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122168522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Signal-dependent clock-feedthrough cancellation in switched-current circuits 开关电流电路中依赖信号的时钟馈通抵消
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184478
T. Fiez, D. Allstot, G. Liang, P. Lao
{"title":"Signal-dependent clock-feedthrough cancellation in switched-current circuits","authors":"T. Fiez, D. Allstot, G. Liang, P. Lao","doi":"10.1109/CICCAS.1991.184478","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184478","url":null,"abstract":"The authors have developed three schemes for cancelling the signal-dependent clock-feedthrough in switched-current circuits. Two of the schemes are based on replicating the current track-and-hold to produce an output current with less than 0.03% THD for a signal to bias current ratio of 0.5 and current mirror sizes of W/L=20 mu m1/2 mu m. In the third scheme, by adapting the clock signal to the signal level, a constant clock-feedthrough is produced. All of the cancellation schemes presented have been integrated in a 2 mu m CMOS process.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130552017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
Placement optimizations by the dynamical neural global optimization algorithm 基于动态神经全局优化算法的布局优化
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184407
Jun Liu, Deren Gu, Zhaoming Wang, Jialong Lan
{"title":"Placement optimizations by the dynamical neural global optimization algorithm","authors":"Jun Liu, Deren Gu, Zhaoming Wang, Jialong Lan","doi":"10.1109/CICCAS.1991.184407","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184407","url":null,"abstract":"In this paper, a neural global optimization algorithm is proposed and used to solve placement optimization problems. The results are better than those obtained in many other papers and the operating time is lower due to the parallel processing property of the neural networks.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120936658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A fast method for MOS model evaluation in VLSI simulation with controllable error 一种误差可控的超大规模集成电路仿真中MOS模型快速评估方法
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184318
C.W. Cheng, C.K. Li
{"title":"A fast method for MOS model evaluation in VLSI simulation with controllable error","authors":"C.W. Cheng, C.K. Li","doi":"10.1109/CICCAS.1991.184318","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184318","url":null,"abstract":"The authors present a tree-based model approximation (TBMA) MOSFET table model. With the method, the function domain of interest is partitioned recursively. Compared with an even partition strategy in a conventional table look-up, the partition size of a region inside the domain is large when the function is less nonlinear in that region and it is smaller if the function is more nonlinear. To reduce the dimension of the table, the gate-offset-voltage concept is used to shrink the three dimensional MOSFET model to a two dimensional model, maintaining the overall accuracy within a few percent. If smaller error is required, a TBMA correction table can be imposed to reduce the evaluation error to a specified value. Also, a new algorithm for constructing continuity partitions in the TBMA table is proposed.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"238 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121150843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
On design of FDNR continuous time MOSFET-C band-pass filters FDNR连续时间MOSFET-C带通滤波器的设计
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184452
Xao Yang, Zhang Shiyan
{"title":"On design of FDNR continuous time MOSFET-C band-pass filters","authors":"Xao Yang, Zhang Shiyan","doi":"10.1109/CICCAS.1991.184452","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184452","url":null,"abstract":"According to the novel floating FDNR (frequency dependent negative resistor) circuit model the authors present a new continuous time MOSFET-C filter-FDNR continuous time MOSFET-C filter. The paper provides design method of the band-pass filters and discusses the frequency range of the application of the filters.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125781934","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Reduced method of indefinite admittance matrix for analyzing and computing switched-capacitor networks 分析计算开关电容网络的不定导纳矩阵的简化方法
China., 1991 International Conference on Circuits and Systems Pub Date : 1991-06-16 DOI: 10.1109/CICCAS.1991.184332
Zhao Shujiang
{"title":"Reduced method of indefinite admittance matrix for analyzing and computing switched-capacitor networks","authors":"Zhao Shujiang","doi":"10.1109/CICCAS.1991.184332","DOIUrl":"https://doi.org/10.1109/CICCAS.1991.184332","url":null,"abstract":"The author describes a new analysis and computation of SC (Switched-Capacitor) networks by using the indefinite admittance matrix (IAM) in the Z-domain. He shows how a general SC network and corresponding admittance matrix can be analyzed, and computed by nine basic building blocks and nine corresponding admittance matrices. Finally an algorithm and examples of the proposed method are given.<<ETX>>","PeriodicalId":119051,"journal":{"name":"China., 1991 International Conference on Circuits and Systems","volume":"132 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133862936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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