69th Device Research Conference最新文献_第7页

Low loss AlInN/GaN Monolithic Microwave Integrated Circuit switch 低损耗alin /GaN单片微波集成电路开关

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994438

A. Sattu, D. Billingsley, J. Deng, J. Yang, R. Gaska, M. Shur, G. Simin

引用次数: 2

Orthogonal spin transfer MRAM 正交自旋转移MRAM

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994472

D. Bedau, D. Backes, H. Liu, J. Langer, P. Manandhar, A. Kent

引用次数: 0

High-mobility organic thin-film transistors with photolithographically patterned top contacts 高迁移率有机薄膜晶体管与光刻图像化顶部触点

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994449

U. Zschieschang, N. H. Hansen, J. Pflaum, Tatsuya Yamamoto, K. Takimiya, H. Kuwabara, M. Ikeda, T. Sekitani, T. Someya, H. Klauk

{"title":"High-mobility organic thin-film transistors with photolithographically patterned top contacts","authors":"U. Zschieschang, N. H. Hansen, J. Pflaum, Tatsuya Yamamoto, K. Takimiya, H. Kuwabara, M. Ikeda, T. Sekitani, T. Someya, H. Klauk","doi":"10.1109/DRC.2011.5994449","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994449","url":null,"abstract":"Due to its large-area capability and high resolution, photolithography is the preferred patterning method for pentacene thin-film transistors (TFTs) for display and circuit applications [1,2]. Since the morphology of thin pentacene films is very sensitive to solvents and heat [3,4], the photolithographic patterning of the source/drain contacts is ideally performed prior to the pentacene deposition, which explains the general preference for the bottom-contact (coplanar) TFT structure. However, as experiments [5] and simulations [6,7] have shown, the bottom-contact TFT structure is associated with substantially larger contact resistance than the top-contact (staggered) structure, which means that for the same channel length, top-contact TFTs are expected to provide larger transconductance and higher cutoff frequency than bottom-contact TFTs. Here we report on organic TFTs with Au top contacts patterned by ordinary photolithography and wet etching (using common solvents, photoresists, and etchants) having field-effect mobilities (0.4 cm2/Vs) and on/off current ratios (107) similar to those of optimized bottom-contact pentacene TFTs [1,2,5].","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120953163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

C-V measurements of single vertical nanowire capacitors 单垂直纳米线电容器的C-V测量

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994444

P. Mensch, K. Moselund, S. Karg, E. Lortscher, M. Bjork, H. Schmid, H. Riel

引用次数: 6

“Zero” drain-current drift of inversion-mode NMOSFET on InP (111)A surface InP (111)A表面上NMOSFET的“零”漏极电流漂移

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994430

Chen Wang, Min Xu, R. Colby, E. Stach, P. Ye

{"title":"“Zero” drain-current drift of inversion-mode NMOSFET on InP (111)A surface","authors":"Chen Wang, Min Xu, R. Colby, E. Stach, P. Ye","doi":"10.1109/DRC.2011.5994430","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994430","url":null,"abstract":"InP is a commonly used compound semiconductor with wide applications in electronic, optoelectronic, and photonic devices. Compared to GaAs, InP is widely believed to be a more forgiving material with respect to Fermi level pinning and has a higher electron saturation velocity (2.5×107 cm/s) as well. It could be a viable channel material for high-speed logic applications if a high-quality, thermodynamically stable high-k dielectric could be found. [1] It is of great importance for the understanding of high-k/InP interfaces since InP is identified as a transition layer for ALD high-k/InGaAs quantum well transistor in state-of-the-art devices. [2] Motivated by previous work on surface orientation studies of GaAs [3] and InGaAs [4], we have systematically studied NMOSFETs, MOSCAPs, and interfacial chemistry on two different crystalline surfaces: InP (100) and (111)A (In-rich). With ALD Al2O3 in direct contact as gate dielectric, a record high drain current of 600 µA/µm is obtained for an InP inversion-mode MOSFET on the (111)A surface with a gate length of 1µm, which is a factor of 2.6 enhancement compared to the (100) surface at the same VG-VT condition. The smoother Al2O3/(111)A interface and a shift of the charge-neutrality-level (CNL) [5] on InP(111)A toward the conduction band edge is identified as the origin of this drain current enhancement in spite of the extracted interface trap density (Dit). [6] In this paper, we report on “zero” drain-current drift on InP (111)A MOSFETs which is a major issue to prevent commercializing InP MOSFET technology on (100) surface in 1980s. [7]","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129360469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

High performance N- and P-type gate-all-around nanowire MOSFETs fabricated on bulk Si by CMOS-compatible process 采用cmos兼容工艺在大块硅上制备高性能N型和p型栅极全能纳米线mosfet

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994423

Yi Song, Huajie Zhou, Qiuxia Xu, Jun Luo, Chao Zhao, Q. Liang

引用次数: 1

Indium-free transparent thin film transistors based on nanocrystalline ZnO 基于纳米晶ZnO的无铟透明薄膜晶体管

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994516

B. Bayraktaroglu, K. Leedy, R. Scott

引用次数: 0

1.0 THz fmax InP DHBTs in a refractory emitter and self-aligned base process for reduced base access resistance 1.0 THz fmax InP dhbt在耐火发射极和自对准基极工艺，以减少基极接入电阻

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994528

V. Jain, J. Rode, H. Chiang, A. Baraskar, E. Lobisser, B. Thibeault, M. Rodwell, M. Urteaga, D. Loubychev, A. Snyder, Y. Wu, J. Fastenau, W.K. Liu

{"title":"1.0 THz fmax InP DHBTs in a refractory emitter and self-aligned base process for reduced base access resistance","authors":"V. Jain, J. Rode, H. Chiang, A. Baraskar, E. Lobisser, B. Thibeault, M. Rodwell, M. Urteaga, D. Loubychev, A. Snyder, Y. Wu, J. Fastenau, W.K. Liu","doi":"10.1109/DRC.2011.5994528","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994528","url":null,"abstract":"We report 220 nm InP double heterojunction bipolar transistors (DHBTs) demonstrating f<inf>τ</inf> = 480 GHz and f<inf>max</inf> = 1.0 THz. Improvements in the emitter and base processes have made it possible to achieve a 1.0 THz f<inf>max</inf> even at 220 nm wide emitter-base junction with a 1.1 µm wide base-collector mesa. A vertical emitter metal etch profile, wet-etched thin InP emitter semiconductor with less than 10 nm undercut and self-aligned base contact deposition reduces the emitter semiconductor-base metal gap (W<inf>gap</inf>) to ∼ 10 nm, thereby significantly reducing the gap resistance term (R<inf>gap</inf>) in the total base access resistance (R<inf>bb</inf>), enabling a high f<inf>max</inf> device. Reduction in the total collector base capacitance (C<inf>cb</inf>) through undercut in the base mesa below base post further improved f<inf>max</inf>. These devices employ a Mo/W/TiW refractory emitter metal contact which allows biasing the transistors at high emitter current densities (J<inf>e</inf>) without problems of electromigration or contact diffusion under electrical stress [1].","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":"1 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113972545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 23

Spintronics search engines 自旋电子学搜索引擎

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994459

H. Dery, B. Ciftcioglu, Yang Song, Hui Wu, Michael C. Huang, R. Kawakami, Jing Shi, I. Krivorotov, I. Žutić, L. Sham

引用次数: 0

Numerical study of electronic transport through bilayer graphene nanoribbons 双层石墨烯纳米带电子输运的数值研究

69th Device Research Conference Pub Date : 2011-06-20 DOI: 10.1109/DRC.2011.5994439

K. M. Masum Habib, R. Lake

引用次数: 4