Yi Song, Huajie Zhou, Qiuxia Xu, Jun Luo, Chao Zhao, Q. Liang
{"title":"High performance N- and P-type gate-all-around nanowire MOSFETs fabricated on bulk Si by CMOS-compatible process","authors":"Yi Song, Huajie Zhou, Qiuxia Xu, Jun Luo, Chao Zhao, Q. Liang","doi":"10.1109/DRC.2011.5994423","DOIUrl":null,"url":null,"abstract":"We demonstrate high performance silicon nanowire gate-all-around MOSFETs (SNWFETs) fabricated on bulk Si by a novel top-down CMOS-compatible method. The fabricated N- and P-type SNWFETs of sub-50 nm gate length and of ∼5 nm in diameter show excellent short channel effects (SCEs) immunity with subthreshold slope (SS) of 90/69 mV/dec, DIBL of 47/10 mV/V, and high driving current of 2×10<sup>3</sup>/5.4×10<sup>3</sup> µA/µm at 0.1 nA/µm off-current.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"69th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2011.5994423","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
We demonstrate high performance silicon nanowire gate-all-around MOSFETs (SNWFETs) fabricated on bulk Si by a novel top-down CMOS-compatible method. The fabricated N- and P-type SNWFETs of sub-50 nm gate length and of ∼5 nm in diameter show excellent short channel effects (SCEs) immunity with subthreshold slope (SS) of 90/69 mV/dec, DIBL of 47/10 mV/V, and high driving current of 2×103/5.4×103 µA/µm at 0.1 nA/µm off-current.