Power electronic devices and components最新文献_第10页

Reliability Behavior of A Resin-Free Nanosilver Paste at Ultra-Low Temperature of 180°C 超低温180℃下无树脂纳米银浆料的可靠性行为

Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100014

Bowen Zhang , Shi Chen , Guo-Quan. Lu , Yun-Hui. Mei

{"title":"Reliability Behavior of A Resin-Free Nanosilver Paste at Ultra-Low Temperature of 180°C","authors":"Bowen Zhang , Shi Chen , Guo-Quan. Lu , Yun-Hui. Mei","doi":"10.1016/j.pedc.2022.100014","DOIUrl":"10.1016/j.pedc.2022.100014","url":null,"abstract":"<div><p>In this paper, excellent thermo-mechanical reliability of resin-free silver sintering for large-area (20 × 20 mm<sup>2</sup>) bonding was successfully achieved by using a trimodal particle system composed of nano-, submicron-, and micron-sized Ag particles. After 1000 cycles of the thermal shock (TS) test, the transient thermal impedance (<em>Z</em><sub>th</sub>) increase of the proposed resin-free silver paste sintered at 180°C under 2 MPa and 5 MPa is only 5.8% and 6.1%, respectively. Due to the avoidance of resin degradation, the obtained resin-free silver paste as-sintered under 5 MPa exhibt outstanding shear strength (>12.5 MPa) even after 1000 cycles TS test. The obtained cross-sectional microstructure can confirms the excellent thermo-mechanical reliability of the sintered resin-free silver paste, which exhibits a denser and more homogeneous bonding layer with a porosity as low as 12.5%. Furthermore, distinct indications of plastic flow can be observed on the fracture surfaces of corresponding joints before and after aging, which further confirm the superiority of proposed resin-free sintering method. The development of novel resin-free silver paste successfully promotes the thermo-mechanical reliability of silicon carbide (SiC) power devices at a low processing temperature of 180°C, and greatly benefits the practical application of SiC power devices.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100014"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000116/pdfft?md5=9130e3a3dd989bf628bfe74e34bab39d&pid=1-s2.0-S2772370422000116-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46184658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Research on Long-term Reliability of Silver Sintered Press-Pack IGBT Modules 银烧结压包IGBT模块长期可靠性研究

Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100012

Renkuan Liu, Hui Li, Ran Yao, Xiao Wang, Hongtao Tan, Wei Lai, Yue Yu, Zheyan Zhu, Bailing Zhou

{"title":"Research on Long-term Reliability of Silver Sintered Press-Pack IGBT Modules","authors":"Renkuan Liu, Hui Li, Ran Yao, Xiao Wang, Hongtao Tan, Wei Lai, Yue Yu, Zheyan Zhu, Bailing Zhou","doi":"10.1016/j.pedc.2022.100012","DOIUrl":"10.1016/j.pedc.2022.100012","url":null,"abstract":"<div><p>Owing to the advantages of short-circuit failure mode, double-sided heat dissipation, and low thermal resistance, press-pack insulated gate bipolar transistors (PP-IGBTs) are widely used in high-power-density applications, such as high-voltage direct-current converters. As the core device of large-capacity power equipment, the reliability of a PP-IGBT is directly related to the security of the power system. In recent years, a silver-sintered package has been proposed to improve the electro-thermal performance of PP-IGBTs. However, the long-term reliability of this package has not been proven. In response to this problem, 3300-V/50-A silver-sintered PP-IGBT (SPP-IGBT) modules are used in long-reliability research. First, electro-thermal-stress finite-element models of PP-IGBTs and SPP-IGBTs were proposed and the accuracy of models verified by experiments. Through a simulation comparison, the results show that under the rated operating conditions, the on-voltage and maximum temperature of SPP-IGBTs dropped by 9.3% and 3.7%, respectively. In addition, the temperature and stress of each component were reduced, among which the surface stress of the IGBT chip emitter dropped by as much as 24.7%. Subsequently, a power-cycle test platform was established, and three PP-IGBTs and three SPP-IGBTs were tested. Finally, the experimental results were compared and analyzed, and the reasons for the sharp increase of on-voltage and metal melt were explored. The results show that the silver-sintered package improves the electrical-thermal performance and long-term reliability of the module.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100012"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000098/pdfft?md5=aca55048c51a157d66b0a00354cfefc3&pid=1-s2.0-S2772370422000098-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48929832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Switching waveform design with gate charge control for power MOSFETs 功率mosfet的栅极电荷控制开关波形设计

Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100018

Hirotaka Oomori, Ichiro Omura

引用次数: 1

A detailed study of Qdc of 3D micro air-core inductors for integrated power supplies: Power supply in package (PSiP) and power supply on chip (PSoC) 集成电源:封装电源(PSiP)和片上电源(PSoC)的3D微型空芯电感Qdc详细研究

Power electronic devices and components Pub Date : 2022-06-01 DOI: 10.1016/j.pedc.2022.100006

Chandra Shetty

{"title":"A detailed study of Qdc of 3D micro air-core inductors for integrated power supplies: Power supply in package (PSiP) and power supply on chip (PSoC)","authors":"Chandra Shetty","doi":"10.1016/j.pedc.2022.100006","DOIUrl":"https://doi.org/10.1016/j.pedc.2022.100006","url":null,"abstract":"<div><p>This work presents the impact of design parameters such as the number of turns, pitch, height, conductor dimensions, etc., on the dc ratio of inductance to resistance <span><math><mrow><mo>(</mo><msub><mi>L</mi><mrow><mi>d</mi><mi>c</mi></mrow></msub><mo>/</mo><msub><mi>R</mi><mrow><mi>d</mi><mi>c</mi></mrow></msub><mo>)</mo></mrow></math></span> (also known as dc quality factor <span><math><msub><mi>Q</mi><mrow><mi>d</mi><mi>c</mi></mrow></msub></math></span>) of 3D micro air-core inductors. We consider two well-known traditional inductors for the illustration: the toroid and the solenoid. We evaluate the performance of these inductors with respect to <span><math><msub><mi>Q</mi><mrow><mi>d</mi><mi>c</mi></mrow></msub></math></span> over a wide range of design parameters. To demonstrate our research findings, we have implemented the solenoid and toroid inductors on a PCB of size 5 mm <span><math><mo>×</mo></math></span> 5 mm.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"2 ","pages":"Article 100006"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000037/pdfft?md5=4c258942c26f193cd72a52bfbf04f00f&pid=1-s2.0-S2772370422000037-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136554238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Non‐ideal behavior of ZVS inverter comprising variable and fixed frequency operation: Analysis, compensation, and verification 包括可变频率和固定频率的ZVS逆变器的非理想行为:分析、补偿和验证

Power electronic devices and components Pub Date : 2022-06-01 DOI: 10.1016/j.pedc.2022.100007

Benedikt Kohlhepp, Jens Heubeck, Thomas Duerbaum

{"title":"Non‐ideal behavior of ZVS inverter comprising variable and fixed frequency operation: Analysis, compensation, and verification","authors":"Benedikt Kohlhepp, Jens Heubeck, Thomas Duerbaum","doi":"10.1016/j.pedc.2022.100007","DOIUrl":"10.1016/j.pedc.2022.100007","url":null,"abstract":"<div><p>This paper presents a study of a two-level inverter. It proposes a modulation scheme for inverters featuring zero-voltage switching (ZVS) with both fixed and variable switching frequency operation. The control scheme uses a hybrid method to determine the switching actions of the half-bridge consisting of a current threshold detection circuit and predictions from numerical evaluations of fundamental waveforms of an ideal half-bridge circuit. Compared with conventional fixed frequency PWM inverters, the inverter in this study exhibits higher rms currents but eliminates switching losses. As several components in practical setups of the inverter inevitably introduce non-idealities, a study of these and their impact on the output waveforms follows. The study comprises the propagation delay of the current threshold detection circuit, the filter capacitance, and the DC-link capacitance. Our study demonstrates the need to consider these effects. We show that smooth output waveforms can be achieved for low and high voltage applications if these effects are properly taken into account in an experimental setup. The total harmonic distortion (THD) is used to evaluate the output waveform quality, which is 0.81% when all effects are properly considered, © 2017 Elsevier Inc. All rights reserved.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"2 ","pages":"Article 100007"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000049/pdfft?md5=3910ebda6ebd5450bbc1294141985509&pid=1-s2.0-S2772370422000049-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43327678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Comparison of GaN Enhancement Mode Transistor Performance With Integrated and External Driver 集成和外部驱动GaN增强模式晶体管性能的比较

Power electronic devices and components Pub Date : 2022-06-01 DOI: 10.1016/j.pedc.2022.100004

Martijn Deckers , Simon Ravyts , Mauricio Dalla Vecchia , Urmimala Chatterjee , Johan Driesen

{"title":"Comparison of GaN Enhancement Mode Transistor Performance With Integrated and External Driver","authors":"Martijn Deckers , Simon Ravyts , Mauricio Dalla Vecchia , Urmimala Chatterjee , Johan Driesen","doi":"10.1016/j.pedc.2022.100004","DOIUrl":"10.1016/j.pedc.2022.100004","url":null,"abstract":"<div><p>GaN components allow to reduce power losses as the lower specific on-resistance and higher switching speeds reduce both the conduction and switching loss. However, parasitics in the gate loop cause ringing which endangers the component. To counteract these problems the switching speed is lowered renouncing part of the components superior performance. A possible way to avoid gate loop parasitics and make circuit design less challenging is integrating the driver in the same package with the GaN transistor. In this paper the performance of an integrated driver with enhancement mode GaN half-bridge that is monolithically integrated using IMEC GaN-on-SOI will be tested in a synchronous boost converter setup. Converter efficiency and switching waveforms will be reported together with a comparison to a GaN half-bridge with external drivers. The converter is tested at input voltages up to 50 V and powers up to 100 W. Package temperature measurements are included to estimate the influence of the temperature dependent on-resistance on the results. At the end of the paper, a sensitivity analysis is conducted to quantify the behaviour of the losses in function of different input parameters including a measurement at switching frequencies up to 1MHz.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"2 ","pages":"Article 100004"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000013/pdfft?md5=61b101ffdc4a77fe382d6039913e7891&pid=1-s2.0-S2772370422000013-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44212977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

The Effect of the Pillar Ripple on the Reverse Recovery in Superjunction MOSFETs 柱纹波对超结mosfet反向恢复的影响

Power electronic devices and components Pub Date : 2022-06-01 DOI: 10.1016/j.pedc.2022.100009

H. Kang , N. Donato , F. Udrea

引用次数: 0

Choice of control function in magnetically-coupled full bridge DC-DC power controller for arc welding: A Practical Approach 弧焊用磁耦合全桥DC-DC电源控制器控制功能的选择:一种实用方法

Power electronic devices and components Pub Date : 2022-06-01 DOI: 10.1016/j.pedc.2022.100005

Arun Kumar Paul

{"title":"Choice of control function in magnetically-coupled full bridge DC-DC power controller for arc welding: A Practical Approach","authors":"Arun Kumar Paul","doi":"10.1016/j.pedc.2022.100005","DOIUrl":"10.1016/j.pedc.2022.100005","url":null,"abstract":"<div><p>In a full bridge DC-DC converter (FBDC) the transformer is a major component for controlled power delivery to secondary side isolated DC loads. Its excitation characteristics is nonlinear and it suffers from a serious problem called magnetic saturation. The power loss in it and also in power switching devices connected at its primary are calculated based on the assumption that the DC flux in core is considered zero. Inverter topology often influences the parametric design of transformer. This article elaborates, with detailed practical validation, that the transformer could influence on choice of suitable control function and its gain values. For that, two popular control functions i.e., proportional plus integral (PI) and second order sliding mode control (SOSMC) would be elaborated here. The approach of controller design for PI and SOSMC is different. Collective approach of gain selection in PI results conservative values of its two gains. On the other hand, two gains in SOSMC are purely based on worst-case process behavior, value of each gain is large. For compatibility study of both control functions in FBDC, nonlinear, extremely dynamic, wide range and diverse arc welding process would be considered as load. Experimental results suggests that SOSMC generates superior control performance in terms of robustness features and control response. Still, as this article further establishes with requisite practical validations, that non-linear magnetic circuit could act as a hindrance for effective utilization of capacity of FBDC based on high-gain fractional order SOSMC function.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"2 ","pages":"Article 100005"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000025/pdfft?md5=5cc12504c00e9783adb5dc51af3ace9a&pid=1-s2.0-S2772370422000025-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48878205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Optimization of linear cell 4H-SiC power JBSFETs: Impact of N+ source contact resistance 线性电池4H-SiC功率jbsfet优化:N+源接触电阻的影响

Power electronic devices and components Pub Date : 2022-06-01 DOI: 10.1016/j.pedc.2022.100008

Aditi Agarwal, B. Jayant Baliga

{"title":"Optimization of linear cell 4H-SiC power JBSFETs: Impact of N+ source contact resistance","authors":"Aditi Agarwal, B. Jayant Baliga","doi":"10.1016/j.pedc.2022.100008","DOIUrl":"10.1016/j.pedc.2022.100008","url":null,"abstract":"<div><p>SiC JBSFETs are fabricated using low contact anneal temperature to simultaneously form the ohmic contact to the N<sup>+</sup> source region and a Schottky contact at the JBS diode. It is demonstrated in this paper that a larger N<sup>+</sup> source contact width can substantially improve the on-resistance and figures-of-merit of SiC power JBSFETs.</p><p>The analysis, using analytical models supported by TCAD simulations and experimental data, was performed for JBSFETs with three blocking voltage ratings of 600 V, 1200 V, and 1700 V. For a specific contact resistance of 0.8 mΩ-cm<sup>2</sup>, it was found that the JBSFET specific on-resistance can be reduced by ∼25% by using an optimum N<sup>+</sup> source contact width of 3 µm, rather than the conventional 1 µm, for all blocking voltages. The modelling demonstrated a monotonic reduction in the gate-drain capacitance and charge with increase in the N<sup>+</sup> source contact width. A reduction of these parameters by 33% was observed when the N<sup>+</sup> source contact width was increased to the optimum 3 µm value. Consequently, the high frequency figures-of-merit for the JBSFETs improved by a remarkable 65% with the optimized N<sup>+</sup> source contact width of 3 µm compared with the conventional design of 1 µm.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"2 ","pages":"Article 100008"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000050/pdfft?md5=a37c1c43170c8f36a60dcb55b3cbb220&pid=1-s2.0-S2772370422000050-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46424395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Power electronic devices and components, the heart of energy management 电力电子器件及元件，能源管理的核心

Power electronic devices and components Pub Date : 2022-03-01 DOI: 10.1016/j.pedc.2021.100003

引用次数: 2