Power electronic devices and components最新文献

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Input and output total currents characterization in BCM and CCM Interleaved Power Converters Under Inductance Mismatch 电感失配下BCM和CCM交错功率变换器的输入和输出总电流特性
Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100016
Paula Cervellini , Marco Carnaghi , Pablo Antoszczuk , Rogelio García Retegui , Marcos Funes
{"title":"Input and output total currents characterization in BCM and CCM Interleaved Power Converters Under Inductance Mismatch","authors":"Paula Cervellini ,&nbsp;Marco Carnaghi ,&nbsp;Pablo Antoszczuk ,&nbsp;Rogelio García Retegui ,&nbsp;Marcos Funes","doi":"10.1016/j.pedc.2022.100016","DOIUrl":"10.1016/j.pedc.2022.100016","url":null,"abstract":"<div><p>This paper presents a complete characterization of input and output currents in interleaved power converters with inductance mismatch, operating in Boundary Conduction Mode (<em>BCM</em>) and Continuous Conduction Mode (<em>CCM</em>). The proposal allows to compute these currents in several interleaved converter topologies for the entire range of operating points, considering any number of phases and any inductance ratio. Input and output currents are recovered from the values obtained when adding the phase currents in the instants where the slopes change; values that are thus defined as key points. This methodology is based on the coincidences that exist between the instants of the phase current key points and those of total currents. By using the computed key points, ripple amplitude, rms value and harmonic content of input and output total currents for the entire range of operating points can be easily obtained. Simulations are conducted on a 5-phase boost converter and a 5-phase buck converter under different conditions in order to validate the proposal expressions. Experimental tests on a 5-phase buck converter are presented under different operation conditions to verify that the proposed method can be applied in real situation.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100016"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S277237042200013X/pdfft?md5=b823e6a4d535a053f07491b7386813b3&pid=1-s2.0-S277237042200013X-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45930409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Surface discharge characteristics of silicone gel and DBC under positive repetitive square voltage 硅凝胶和DBC在正重复平方电压下的表面放电特性
Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100021
Chao Li , Boyuan Cao , Xuebao Li , Xiangchen Liu , Jinjin Cheng , Zhaocheng Liu , Zhibin Zhao , Zhongguang Yang
{"title":"Surface discharge characteristics of silicone gel and DBC under positive repetitive square voltage","authors":"Chao Li ,&nbsp;Boyuan Cao ,&nbsp;Xuebao Li ,&nbsp;Xiangchen Liu ,&nbsp;Jinjin Cheng ,&nbsp;Zhaocheng Liu ,&nbsp;Zhibin Zhao ,&nbsp;Zhongguang Yang","doi":"10.1016/j.pedc.2022.100021","DOIUrl":"10.1016/j.pedc.2022.100021","url":null,"abstract":"<div><p>Silicone gel and direct bonded copper (DBC) as the key components of high voltage power devices are widely used in the insulation packaging of high voltage power devices, respectively. With the increase of the voltage level, the insulation problem between silicone gel and DBC interface limits the development of high voltage power devices under positive square wave voltage. In this paper, an experimental platform under this voltage is established. The surface discharge characteristics of silicone gel and DBC interface are investigated. In order to remove the displacement current interference on the discharge current generated at the rising and falling stage of positive repetitive square voltage, high frequency discharge current and high-frequency magnetic field measured by antennas are simultaneously measured, and the discharge current pulse are extracted based on the one-to-one relationship between high frequency discharge current and high-frequency magnetic field. Furthermore, the specific characteristics of the forward and backward discharge current pulses of interface between silicone gel and DBC, such as amplitude, discharge number and partial discharge repetition rate, under different voltage amplitudes, frequencies and duty cycles are extracted and analyzed. Besides, the influences of frequency and duty cycle of the positive repetitive squarevoltage on the discharge initiation voltages are investigated. Finally, the mechanism of surface discharge between silicone gel and DBC under positive repetitive square wave voltage has been explained.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100021"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000189/pdfft?md5=df71c99646c266313ddfda323d5931f2&pid=1-s2.0-S2772370422000189-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44474615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Performance limits of high voltage press-pack SiC IGBT and SiC MOSFET devices 高压压封装SiC IGBT和SiC MOSFET器件的性能限制
Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100019
Lubin Han , Lin Liang , Yijian Wang , Xinling Tang , Song Bai
{"title":"Performance limits of high voltage press-pack SiC IGBT and SiC MOSFET devices","authors":"Lubin Han ,&nbsp;Lin Liang ,&nbsp;Yijian Wang ,&nbsp;Xinling Tang ,&nbsp;Song Bai","doi":"10.1016/j.pedc.2022.100019","DOIUrl":"10.1016/j.pedc.2022.100019","url":null,"abstract":"<div><p>Considering the switching frequency limit and electromagnetic interference, the selection of high voltage SiC IGBT and SiC MOSFET is confusing due to punch-through effect and bipolar characteristics of SiC IGBT. The thermal resistance, static characteristics and dynamic characteristics of SiC IGBT and SiC MOSFET module with Press-Pack packaging are measured to evaluate the switching frequency limit and electromagnetic interfere of them. The tradeoffs of SiC IGBT between switching frequency limit and electromagnetic interfere are less attractive due to the intrinsic characteristics, such as high power loss and punch-through effect. The possible solutions for SiC IGBT are proposed based on the improvement of driving resistor and driving voltage.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100019"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000165/pdfft?md5=63a79f12f7fa469b53c97b1479590108&pid=1-s2.0-S2772370422000165-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46368910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Si-IGBT and SiC-MOSFET hybrid switch-based 1.7 kV half-bridge power module 基于Si-IGBT和SiC-MOSFET混合开关的1.7 kV半桥功率模块
Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100020
Amol Deshpande , Riya Paul , Asif Imran Emon , Zhao Yuan , Hongwu Peng , Fang Luo
{"title":"Si-IGBT and SiC-MOSFET hybrid switch-based 1.7 kV half-bridge power module","authors":"Amol Deshpande ,&nbsp;Riya Paul ,&nbsp;Asif Imran Emon ,&nbsp;Zhao Yuan ,&nbsp;Hongwu Peng ,&nbsp;Fang Luo","doi":"10.1016/j.pedc.2022.100020","DOIUrl":"10.1016/j.pedc.2022.100020","url":null,"abstract":"<div><p>This paper informs the design guidelines, fabrication process, and evaluation of a 1.7-kV and 300-A multi-chip half bridge power module using the novel Si-IGBT and SiC-MOSFET hybrid switch in each switch position. The module achieves its maximum DC current rating with a 6:1 current ratio of Si to SiC. This high current ratio yields significant cost savings compared to an all-SiC power module. The module employs high-reliability silver clips, which replaces conventional wire bonds for top-side interconnection, to partly enable a low power loop inductance of 12.38 nH. A novel thermal pyrolytic graphite-encapsulated metal baseplate is key to reducing the thermal coupling among the adjacent Si and SiC die, enabling higher junction temperature for SiC die relative to the Si die.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100020"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000177/pdfft?md5=9d197591a78048f45d9059d05202df32&pid=1-s2.0-S2772370422000177-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48432616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Semi-additive patterning process based fabrication of miniaturized, package-embedded high conversion ratio inductors for DC-DC converters 用于DC-DC变换器的小型化、封装嵌入式高转换比电感的半增材工艺制造
Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100023
Prahalad Murali , Claudio Alvarez , Srinidhi Suresh , Mark D. Losego , Madhavan Swaminathan , Yusuke Oishi , Tomohito Uemura , Ryo Nagatsuka , Naoki Watanabe
{"title":"Semi-additive patterning process based fabrication of miniaturized, package-embedded high conversion ratio inductors for DC-DC converters","authors":"Prahalad Murali ,&nbsp;Claudio Alvarez ,&nbsp;Srinidhi Suresh ,&nbsp;Mark D. Losego ,&nbsp;Madhavan Swaminathan ,&nbsp;Yusuke Oishi ,&nbsp;Tomohito Uemura ,&nbsp;Ryo Nagatsuka ,&nbsp;Naoki Watanabe","doi":"10.1016/j.pedc.2022.100023","DOIUrl":"10.1016/j.pedc.2022.100023","url":null,"abstract":"<div><p>Many data centers currently operate at low power efficiencies (∼75%) because of the many voltage conversions necessary to step down inputs from 48 V to 1 V. This voltage step-down is accomplished in the Power System-on-Chip (PwrSoC) package, which contain large quantities of surface mount inductors. However, surface mount inductors are large in area and require long power delivery networks to supply the voltage to the PwrSoC, thereby leading to interconnection losses and reducing overall system efficiency. Miniaturizing these inductors could place them nearer to the PwrSoC. Miniaturized and embeddable solenoid and toroidal inductors can be built from magnetic substrates using patterned copper windings created from through substrate vias and micropatterning. However, to achieve inductances close to SMTs, magnetic substrates must be thick or have large lateral footprints. Furthermore, the magnetic flux leakage must be minimized between inductors. This work will elucidate the challenges of dielectric filling of through substrate slots, laser drilling of slots and vias in different substrates, and dry film photoresist lamination that will enable complete copper windings. This paper presents the process flow, challenges, and redressal of these challenges to build miniaturized, embedded inductors that have previously been introduced by our research team.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100023"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000207/pdfft?md5=aad7ffbdfd83c5c01dce3b0eb7624126&pid=1-s2.0-S2772370422000207-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46535380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Reliability Behavior of A Resin-Free Nanosilver Paste at Ultra-Low Temperature of 180°C 超低温180℃下无树脂纳米银浆料的可靠性行为
Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100014
Bowen Zhang , Shi Chen , Guo-Quan. Lu , Yun-Hui. Mei
{"title":"Reliability Behavior of A Resin-Free Nanosilver Paste at Ultra-Low Temperature of 180°C","authors":"Bowen Zhang ,&nbsp;Shi Chen ,&nbsp;Guo-Quan. Lu ,&nbsp;Yun-Hui. Mei","doi":"10.1016/j.pedc.2022.100014","DOIUrl":"10.1016/j.pedc.2022.100014","url":null,"abstract":"<div><p>In this paper, excellent thermo-mechanical reliability of resin-free silver sintering for large-area (20 × 20 mm<sup>2</sup>) bonding was successfully achieved by using a trimodal particle system composed of nano-, submicron-, and micron-sized Ag particles. After 1000 cycles of the thermal shock (TS) test, the transient thermal impedance (<em>Z</em><sub>th</sub>) increase of the proposed resin-free silver paste sintered at 180°C under 2 MPa and 5 MPa is only 5.8% and 6.1%, respectively. Due to the avoidance of resin degradation, the obtained resin-free silver paste as-sintered under 5 MPa exhibt outstanding shear strength (&gt;12.5 MPa) even after 1000 cycles TS test. The obtained cross-sectional microstructure can confirms the excellent thermo-mechanical reliability of the sintered resin-free silver paste, which exhibits a denser and more homogeneous bonding layer with a porosity as low as 12.5%. Furthermore, distinct indications of plastic flow can be observed on the fracture surfaces of corresponding joints before and after aging, which further confirm the superiority of proposed resin-free sintering method. The development of novel resin-free silver paste successfully promotes the thermo-mechanical reliability of silicon carbide (SiC) power devices at a low processing temperature of 180°C, and greatly benefits the practical application of SiC power devices.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100014"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000116/pdfft?md5=9130e3a3dd989bf628bfe74e34bab39d&pid=1-s2.0-S2772370422000116-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46184658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Research on Long-term Reliability of Silver Sintered Press-Pack IGBT Modules 银烧结压包IGBT模块长期可靠性研究
Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100012
Renkuan Liu, Hui Li, Ran Yao, Xiao Wang, Hongtao Tan, Wei Lai, Yue Yu, Zheyan Zhu, Bailing Zhou
{"title":"Research on Long-term Reliability of Silver Sintered Press-Pack IGBT Modules","authors":"Renkuan Liu,&nbsp;Hui Li,&nbsp;Ran Yao,&nbsp;Xiao Wang,&nbsp;Hongtao Tan,&nbsp;Wei Lai,&nbsp;Yue Yu,&nbsp;Zheyan Zhu,&nbsp;Bailing Zhou","doi":"10.1016/j.pedc.2022.100012","DOIUrl":"10.1016/j.pedc.2022.100012","url":null,"abstract":"<div><p>Owing to the advantages of short-circuit failure mode, double-sided heat dissipation, and low thermal resistance, press-pack insulated gate bipolar transistors (PP-IGBTs) are widely used in high-power-density applications, such as high-voltage direct-current converters. As the core device of large-capacity power equipment, the reliability of a PP-IGBT is directly related to the security of the power system. In recent years, a silver-sintered package has been proposed to improve the electro-thermal performance of PP-IGBTs. However, the long-term reliability of this package has not been proven. In response to this problem, 3300-V/50-A silver-sintered PP-IGBT (SPP-IGBT) modules are used in long-reliability research. First, electro-thermal-stress finite-element models of PP-IGBTs and SPP-IGBTs were proposed and the accuracy of models verified by experiments. Through a simulation comparison, the results show that under the rated operating conditions, the on-voltage and maximum temperature of SPP-IGBTs dropped by 9.3% and 3.7%, respectively. In addition, the temperature and stress of each component were reduced, among which the surface stress of the IGBT chip emitter dropped by as much as 24.7%. Subsequently, a power-cycle test platform was established, and three PP-IGBTs and three SPP-IGBTs were tested. Finally, the experimental results were compared and analyzed, and the reasons for the sharp increase of on-voltage and metal melt were explored. The results show that the silver-sintered package improves the electrical-thermal performance and long-term reliability of the module.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100012"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000098/pdfft?md5=aca55048c51a157d66b0a00354cfefc3&pid=1-s2.0-S2772370422000098-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48929832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Switching waveform design with gate charge control for power MOSFETs 功率mosfet的栅极电荷控制开关波形设计
Power electronic devices and components Pub Date : 2022-10-01 DOI: 10.1016/j.pedc.2022.100018
Hirotaka Oomori, Ichiro Omura
{"title":"Switching waveform design with gate charge control for power MOSFETs","authors":"Hirotaka Oomori,&nbsp;Ichiro Omura","doi":"10.1016/j.pedc.2022.100018","DOIUrl":"10.1016/j.pedc.2022.100018","url":null,"abstract":"<div><p>The switching waveform design, especially controlling and optimizing the slew rate, is an efficient technique to mitigate the trade-off between decreasing the loss and increasing the noise of the switching power device. The digital active gate driver which generates the gate waveform to achieve the designed switching waveform requires a significant computational burden because the optimum driving point is searched automatically and comprehensively. This paper proposes a novel and simple method to calculate gate waveforms to achieve the designed switching waveforms. This method calculates how much gate charge is additionally required to match the designed waveform by exploiting the voltage and current response of the power device to the small gate charge pulse. The validation of this method is demonstrated by simulation in the case of both the drain-source voltage design and the drain current design. The deviation from the designed waveform is quantified in this paper.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"3 ","pages":"Article 100018"},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000153/pdfft?md5=b83dd185ca87b3991d4b9846e79cd436&pid=1-s2.0-S2772370422000153-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46679683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A detailed study of Qdc of 3D micro air-core inductors for integrated power supplies: Power supply in package (PSiP) and power supply on chip (PSoC) 集成电源:封装电源(PSiP)和片上电源(PSoC)的3D微型空芯电感Qdc详细研究
Power electronic devices and components Pub Date : 2022-06-01 DOI: 10.1016/j.pedc.2022.100006
Chandra Shetty
{"title":"A detailed study of Qdc of 3D micro air-core inductors for integrated power supplies: Power supply in package (PSiP) and power supply on chip (PSoC)","authors":"Chandra Shetty","doi":"10.1016/j.pedc.2022.100006","DOIUrl":"https://doi.org/10.1016/j.pedc.2022.100006","url":null,"abstract":"<div><p>This work presents the impact of design parameters such as the number of turns, pitch, height, conductor dimensions, etc., on the dc ratio of inductance to resistance <span><math><mrow><mo>(</mo><msub><mi>L</mi><mrow><mi>d</mi><mi>c</mi></mrow></msub><mo>/</mo><msub><mi>R</mi><mrow><mi>d</mi><mi>c</mi></mrow></msub><mo>)</mo></mrow></math></span> (also known as dc quality factor <span><math><msub><mi>Q</mi><mrow><mi>d</mi><mi>c</mi></mrow></msub></math></span>) of 3D micro air-core inductors. We consider two well-known traditional inductors for the illustration: the toroid and the solenoid. We evaluate the performance of these inductors with respect to <span><math><msub><mi>Q</mi><mrow><mi>d</mi><mi>c</mi></mrow></msub></math></span> over a wide range of design parameters. To demonstrate our research findings, we have implemented the solenoid and toroid inductors on a PCB of size 5 mm <span><math><mo>×</mo></math></span> 5 mm.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"2 ","pages":"Article 100006"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000037/pdfft?md5=4c258942c26f193cd72a52bfbf04f00f&pid=1-s2.0-S2772370422000037-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136554238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Non‐ideal behavior of ZVS inverter comprising variable and fixed frequency operation: Analysis, compensation, and verification 包括可变频率和固定频率的ZVS逆变器的非理想行为:分析、补偿和验证
Power electronic devices and components Pub Date : 2022-06-01 DOI: 10.1016/j.pedc.2022.100007
Benedikt Kohlhepp, Jens Heubeck, Thomas Duerbaum
{"title":"Non‐ideal behavior of ZVS inverter comprising variable and fixed frequency operation: Analysis, compensation, and verification","authors":"Benedikt Kohlhepp,&nbsp;Jens Heubeck,&nbsp;Thomas Duerbaum","doi":"10.1016/j.pedc.2022.100007","DOIUrl":"10.1016/j.pedc.2022.100007","url":null,"abstract":"<div><p>This paper presents a study of a two-level inverter. It proposes a modulation scheme for inverters featuring zero-voltage switching (ZVS) with both fixed and variable switching frequency operation. The control scheme uses a hybrid method to determine the switching actions of the half-bridge consisting of a current threshold detection circuit and predictions from numerical evaluations of fundamental waveforms of an ideal half-bridge circuit. Compared with conventional fixed frequency PWM inverters, the inverter in this study exhibits higher rms currents but eliminates switching losses. As several components in practical setups of the inverter inevitably introduce non-idealities, a study of these and their impact on the output waveforms follows. The study comprises the propagation delay of the current threshold detection circuit, the filter capacitance, and the DC-link capacitance. Our study demonstrates the need to consider these effects. We show that smooth output waveforms can be achieved for low and high voltage applications if these effects are properly taken into account in an experimental setup. The total harmonic distortion (THD) is used to evaluate the output waveform quality, which is 0.81% when all effects are properly considered, © 2017 Elsevier Inc. All rights reserved.</p></div>","PeriodicalId":74483,"journal":{"name":"Power electronic devices and components","volume":"2 ","pages":"Article 100007"},"PeriodicalIF":0.0,"publicationDate":"2022-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2772370422000049/pdfft?md5=3910ebda6ebd5450bbc1294141985509&pid=1-s2.0-S2772370422000049-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43327678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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