电路与系统学报Pub Date : 2000-04-01DOI: 10.1109/ISCAS.1997.608919
K. Jin'no, M. Tanaka
{"title":"Hysteresis quantizer","authors":"K. Jin'no, M. Tanaka","doi":"10.1109/ISCAS.1997.608919","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.608919","url":null,"abstract":"This paper proposes two type quantizers by using mutual connected neural networks. Since each cell of the neural networks has hysteresis properties, these quantizers can convert any input signals into a suitable quantization output. Also, we propose its application for image processing which can be intensity conversion. By using an area intensity method, we can get high quality output images in spite of to use bilevel output function.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"34 1","pages":"661-664 vol.1"},"PeriodicalIF":0.0,"publicationDate":"2000-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78293016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-12DOI: 10.1109/ISCAS.1997.621841
W. Serdijn, J. Mulder, A. C. van der Woerd, A. V. van Roermund
{"title":"Design of wide-tunable translinear second-order oscillators","authors":"W. Serdijn, J. Mulder, A. C. van der Woerd, A. V. van Roermund","doi":"10.1109/ISCAS.1997.621841","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.621841","url":null,"abstract":"This paper introduces a translinear second-order oscillator that is a direct implementation of a non-linear second-order differential equation. It comprises only two capacitors and a handful of transistors and can be controlled over a very wide frequency range by only one control current. A breadboard version, using transistor arrays, proves the correct operation of the proposed circuit. The oscillator frequency equals 25 kHz, while the total harmonic distortion equals 2.4%.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"143 9-10 1","pages":"829-832 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1997-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90669511","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-12DOI: 10.1109/ISCAS.1997.608504
J. Vankka, M. Waltari, M. Kosunen, K. Halonen
{"title":"Design of a direct digital synthesizer with an on-chip D/A-converter","authors":"J. Vankka, M. Waltari, M. Kosunen, K. Halonen","doi":"10.1109/ISCAS.1997.608504","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.608504","url":null,"abstract":"A 140 MHz Direct Digital Synthesizer (DDS) with an on-chip D/A-converter is designed and processed in 0.8 /spl mu/m BiCMOS. The on-chip D/A-converter avoids delays and line loading caused by interchip connections. The frequency resolution of the DDS is 0.0326 Hz with a corresponding frequency switching speed of 150 ns. The digital parts of the chip are implemented with CMOS design in order to reduce power consumption. The D/A-converter is designed with BiCMOS technology to achieve 10 bit accuracy at a clock rate of 140 MHz. The chip has a complexity of 19,100 transistors with a die area of 12.2 mm/sup 2/. The simulated power dissipation is 0.58 W at 140 MHz.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"72 1","pages":"21-24 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1997-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91136418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.621537
A. Díaz-Sánchez, J. Ramírez-Angulo
{"title":"A novel VLSI sampled-data adaptive filter","authors":"A. Díaz-Sánchez, J. Ramírez-Angulo","doi":"10.1109/ISCAS.1997.621537","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.621537","url":null,"abstract":"A new type of VLSI voltage mode sampled-data adaptive filter architecture is described, The proposed approach uses arithmetic operations in the analog domain to make a circuit level analogy of a specific digital adaptive algorithm. The feedforward characteristic of the delay line allows filter operation at higher frequencies than previously reported. A bandpass adaptive filter with central frequency at 1 MHz and quality factor of ten, demonstrates the feasibility of the proposed approach for a sampling frequency of 20 MHz.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"17 1","pages":"1964-1967 vol.3"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73923825","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.612785
J. Okello, Y. Itoh, I. Nakanishi, Y. Fukui
{"title":"An adaptive IIR digital filter based on estimation of allpass and minimum-phase system","authors":"J. Okello, Y. Itoh, I. Nakanishi, Y. Fukui","doi":"10.1109/ISCAS.1997.612785","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.612785","url":null,"abstract":"In this paper, a new infinite impulse response (IIR) adaptive digital filter (ADF) which is composed of a cascade block of allpass system and a block of minimum-phase system connected in series is proposed. The allpass section is implemented using a series connection of second order allpass systems, while the minimum phase system has all its poles at the origin. The coefficients are updated using a simplified version of the LMS algorithm. By considering the unknown system to be having the same structure as that of the adaptive digital filter, it is proven that the poles of the ADF converges to the poles of the unknown system when the input is a stationary white signal. Computer simulation confirms our analysis.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"47 1","pages":"2313-2316 vol.4"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74137248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.608954
T. Lehmann, R. Woodburn, A. Murray
{"title":"On-chip learning in pulsed silicon neural networks","authors":"T. Lehmann, R. Woodburn, A. Murray","doi":"10.1109/ISCAS.1997.608954","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.608954","url":null,"abstract":"Self-learning chips to implement conventional ANN (artificial neural network) algorithms are very difficult to design and unconvincing in their results. We explain why this is so and say what lessons previous work teaches us in the design of self-learning systems. We offer an alternative, 'biologically-inspired' approach, explaining what we mean by this term and providing an example of a robust, self-learning design which can solve simple classical-conditioning tasks.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"9 1","pages":"693-696 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75249994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.622028
Woojung Lee, Jae-Ho Chung
{"title":"Fingerprint recognition algorithm development using directional information in wavelet transform domain","authors":"Woojung Lee, Jae-Ho Chung","doi":"10.1109/ISCAS.1997.622028","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.622028","url":null,"abstract":"In this paper, a fingerprint recognition algorithm is suggested. The algorithm is developed based on the wavelet transform, and the dominant local orientation which is derived from the coherence and the gradient of Gaussian. By using the wavelet transform, the algorithm does not require conventional preprocessing procedures such as smoothing, binarization, thinning and restoration. Computer simulation results show that when the rate of Type II error-incorrect recognition of two different fingerprints as identical fingerprints-is held at 0.0%, the rate of Type I error-Incorrect recognition of two identical fingerprints as different ones-turns out as 2.5% in real time.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"10 1","pages":"1201-1204 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75744141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.612845
K.T. Wong, M. Zoltowski
{"title":"Self-initiating velocity-field beamspace MUSIC for underwater acoustic direction-finding with irregularly spaced vector-hydrophones","authors":"K.T. Wong, M. Zoltowski","doi":"10.1109/ISCAS.1997.612845","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.612845","url":null,"abstract":"This paper introduces a novel MUSIC-based (MUltiple Signal Classification) blind source localization algorithm applicable to three-dimensional arbitrarily spaced arrays of velocity-hydrophone triads. This proposed algorithm (1) self-generates coarse estimates of the sources' arrival angles to start off its MUSIC-based iterative search without any a priori source parametric information, (2) exploits information embedded in the impinging sonar velocity-field (as versus pressure field), (3) automatically pairs the x-axis direction-cosine estimates with the y-axis direction-cosine estimates. This method uses vector-hydrophones, each of which comprises three spatially co-located but orthogonally oriented velocity-hydrophones. Each velocity-hydrophone distinctly measures one Cartesian component the incident sonar wavefield's velocity-vector. Velocity-hydrophone technology is well established in underwater acoustics and a great variety of commercial models have long been available. This proposed algorithm forms velocity-field beams at each vector-hydrophone, and uses coarse estimates of each source's velocity-vector estimate obtained by decoupling the signal-subspace eigenvectors. Simulation results verify this innovative scheme's capability to self-generate initial direction-cosine estimates for its MUSIC-based iterative search and demonstrate the proposed algorithm's superior performance relative to a similarly spaced army of pressure-hydrophones. Under one scenario, the proposed method lowers the estimation bias by 95% and the estimation standard deviation by 47%, relative to a similarly configured array of pressure-hydrophones provided with a priori initial arrival angle estimates.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"17 1","pages":"2553-2556 vol.4"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74685231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.612856
D. Horrocks, S. Conder
{"title":"Multiplier-less realisation of piecewise linear functions","authors":"D. Horrocks, S. Conder","doi":"10.1109/ISCAS.1997.612856","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.612856","url":null,"abstract":"A method for the representation of a piecewise linear function, based on simple nonlinear operators is presented. It utilises primitive operator graph synthesis, which enables a low complexity multiplierless structure to be obtained. The example of a sigmoid function for neural networks, is used to illustrate the method.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"4 1","pages":"2597-2600 vol.4"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75342116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
电路与系统学报Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.621571
S. Chang, M. Lee, J. Cha
{"title":"A simple parallel architecture for discrete wavelet transform","authors":"S. Chang, M. Lee, J. Cha","doi":"10.1109/ISCAS.1997.621571","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.621571","url":null,"abstract":"In this paper, we present a simple parallel architecture for Discrete Wavelet Transform (DWT). Efficient computation of the pyramid algorithm for the computing of the discrete wavelet transform is possible due to the similarity between computation results of each octave. By using similarity, we separated the filter into 2 parts, an even filter and an odd filter. 1 octave and other octave computation are performed in the even and odd filters at the same time. The proposed architecture has following features. (1) Critical path is 1 multiplier and 1 adder; (2) the number of required registers is 1+J*([L/sub h//2]-1)+1+J*([L/sub 1//2]-1)+J, where J is the number of octaves, L/sub h/ is length of the highpass filter and L/sub 1/ is length of the lowpass filter.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"68 1","pages":"2100-2103 vol.3"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75534794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}