Design of a direct digital synthesizer with an on-chip D/A-converter

A 140 MHz Direct Digital Synthesizer (DDS) with an on-chip D/A-converter is designed and processed in 0.8 /spl mu/m BiCMOS. The on-chip D/A-converter avoids delays and line loading caused by interchip connections. The frequency resolution of the DDS is 0.0326 Hz with a corresponding frequency switching speed of 150 ns. The digital parts of the chip are implemented with CMOS design in order to reduce power consumption. The D/A-converter is designed with BiCMOS technology to achieve 10 bit accuracy at a clock rate of 140 MHz. The chip has a complexity of 19,100 transistors with a die area of 12.2 mm/sup 2/. The simulated power dissipation is 0.58 W at 140 MHz.