{"title":"一种新型VLSI采样数据自适应滤波器","authors":"A. Díaz-Sánchez, J. Ramírez-Angulo","doi":"10.1109/ISCAS.1997.621537","DOIUrl":null,"url":null,"abstract":"A new type of VLSI voltage mode sampled-data adaptive filter architecture is described, The proposed approach uses arithmetic operations in the analog domain to make a circuit level analogy of a specific digital adaptive algorithm. The feedforward characteristic of the delay line allows filter operation at higher frequencies than previously reported. A bandpass adaptive filter with central frequency at 1 MHz and quality factor of ten, demonstrates the feasibility of the proposed approach for a sampling frequency of 20 MHz.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"17 1","pages":"1964-1967 vol.3"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A novel VLSI sampled-data adaptive filter\",\"authors\":\"A. Díaz-Sánchez, J. Ramírez-Angulo\",\"doi\":\"10.1109/ISCAS.1997.621537\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new type of VLSI voltage mode sampled-data adaptive filter architecture is described, The proposed approach uses arithmetic operations in the analog domain to make a circuit level analogy of a specific digital adaptive algorithm. The feedforward characteristic of the delay line allows filter operation at higher frequencies than previously reported. A bandpass adaptive filter with central frequency at 1 MHz and quality factor of ten, demonstrates the feasibility of the proposed approach for a sampling frequency of 20 MHz.\",\"PeriodicalId\":68559,\"journal\":{\"name\":\"电路与系统学报\",\"volume\":\"17 1\",\"pages\":\"1964-1967 vol.3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"电路与系统学报\",\"FirstCategoryId\":\"1093\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.1997.621537\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"电路与系统学报","FirstCategoryId":"1093","ListUrlMain":"https://doi.org/10.1109/ISCAS.1997.621537","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new type of VLSI voltage mode sampled-data adaptive filter architecture is described, The proposed approach uses arithmetic operations in the analog domain to make a circuit level analogy of a specific digital adaptive algorithm. The feedforward characteristic of the delay line allows filter operation at higher frequencies than previously reported. A bandpass adaptive filter with central frequency at 1 MHz and quality factor of ten, demonstrates the feasibility of the proposed approach for a sampling frequency of 20 MHz.