电路与系统(英文)最新文献

{"title":"Dynamic Spectrum Access Protocol for the Digital Dividend","authors":"Raoul Zamblé, Raymond Gbegbe, J.-M. Kadjo, O. Asseu, Pacôme Brou","doi":"10.4236/CS.2016.713340","DOIUrl":"https://doi.org/10.4236/CS.2016.713340","url":null,"abstract":"It is \u0000not more and more, easy to satisfy the important and growing spectrum demands \u0000in the context of the static conventional policy spectrum allocation. \u0000Therefore, to find a suitable solution to this problem, we are to days \u0000observing the apparition of flexible dynamic spectrum allocation methods. These \u0000methods that ought to improve more significantly the spectrum use have gained \u0000much interest. In fact, the digital dividend due to the change-over from the \u0000analog television to the digital terrestrial television must be efficiently used. \u0000So the Dynamic Spectrum Access (DSA) can potentially play a key role in shaping \u0000the future digital dividend use. In the DSA, two kinds of users or networks \u0000coexist on different channels. The first one, known as the primary user, \u0000accesses to a channel with high priority; and the second one, known as \u0000secondary user has a low priority. This paper presents a dynamic spectrum \u0000access protocol based on an auction framework. Our protocol is an interesting \u0000tool that allows the networks to bid and obtain on the available spectrum, the \u0000rights to be primary and secondary users according their valuations and traffic \u0000needs. Based on certain offers, our protocol selects primary and secondary \u0000users for each idle channel in order to realize the maximum economic for the \u0000regulator or social benefits. We deal with the case in which the offers of the \u0000networks are independent one another even if they will share the same channels. \u0000We design an algorithm in accordance with our dynamic spectrum access protocol. \u0000The algorithm is used here to find an optimal solution to the access allocation \u0000problem, specifically to digital dividend. Finally, the results in the numeric \u0000section, regarding the three suggested scenarios, show that the proposed \u0000dynamic spectrum access protocol is viable. The algorithm is able to eliminate \u0000all non-compliant bidders for the available spectrum sharing. We notice that \u0000the revenue or social benefits of the regulator is maximized when we have on \u0000each channel, one primary user and the maximum number of secondary users.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70467871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"New VD-DIBA-Based Single-Resistance-Controlled Sinusoidal Oscillator","authors":"K. L. Pushkar, R. Goel, Kavya Gupta, Pinky Vivek, Javed Ashraf","doi":"10.4236/CS.2016.713341","DOIUrl":"https://doi.org/10.4236/CS.2016.713341","url":null,"abstract":"A new Single-Resistance-Controlled (SRC) sinusoidal oscillator using single Voltage Differencing-Differential Input Buffered Amplifier (VD-DIBA), only four passive components (two capacitors and two resistors), is presented. The proposed structure provides the following advantageous features: 1) independent control of oscillation frequency and condition of oscillation and 2) low active and passive sensitivities. The effects of non-idealities of the VD-DIBA on the proposed oscillator have also been investigated. The proposed SRC sinusoidal oscillator has been checked for robustness using Monte-Carlo simulation. SPICE simulation results have been included using 0.35 μm MIETEC technology to confirm the validity of the proposed SRC sinusoidal oscillator.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70467931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fuzzy Controlled Ultra-Capacitor Based DVR (UCAP-DVR) for Power Quality Enhancement","authors":"R. Bhavani, N. Prabha","doi":"10.4236/CS.2016.713338","DOIUrl":"https://doi.org/10.4236/CS.2016.713338","url":null,"abstract":"In recent years, a rapid decrease in the cost of \u0000various energy storage technologies and their integration into grid becomes a reality with the advent of smart grid. The Dynamic Voltage Restorer (DVR) is a custom power device that has an excellent dynamic capability used to provide voltage sag, swell \u0000compensation in distribution systems. Among \u0000the energy storage devices, Ultra-Capacitors \u0000(UCAP) have ideal characteristics such as high power and \u0000low energy density essential for the compensation of voltage sag and swell, which require high power \u0000for short interval of time. This paper presents an integration of \u0000rechargeable UCAP with DVR. This UCAP-DVR presents a modular, \u0000flexible system configuration that will have an active power capability and also \u0000provide deep, extended mitigation for power quality problems. The DVR is integrated into UCAP via bidirectional DC-DC converter which supports a rigid dc-link voltage for DVR and \u0000also helps in compensating temporary voltage sag and swell. FUZZY LOGIC Controller is used to enhance the performance of UCAP-DVR. The simulation model \u0000for the proposed system has been developed in MAT-LAB and the performance over conventional DVR is \u0000compared with the results obtained.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70468018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Secure Multicast Tree Construction Using Bacterial Foraging Optimization (BFO) for MANET","authors":"A. Arumugam, C. Jayakumar","doi":"10.4236/CS.2016.713342","DOIUrl":"https://doi.org/10.4236/CS.2016.713342","url":null,"abstract":"In Mobile Ad-Hoc Networks (MANET), the group communication for multiple senders and receivers threatens the security features. The multicasting is provoked to various security attacks, eavesdropping etc., hence secure multicasting requires imperative significance. The secure multicast tree construction using Bacterial Foraging Optimization (BPO) algorithm is proposed to develop a secure multicast tree construction in MANET. During routing, the proposed algorithm utilizes the public routing proxy to hide identity of the sender and receiver from other nodes for maintaining confidentiality. The public routing proxy is estimated using bacterial foraging optimization algorithm and path reliability is evaluated after the each iteration. Path reliability enhances the security of the network from black hole attacker and DoS attackers compared to traditional approaches for secure multicast tree formation in MANETs. By simulation results, we have shown that the proposed technique offers authentication and confidentiality during secure multicasting which is compared to conventional multicast tree formation algorithms in MANETs.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70468076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Newly Constructed Real Time ECG Monitoring System Using LabView","authors":"V. Nandagopal, V. Maheswari, C. Kannan","doi":"10.4236/CS.2016.713347","DOIUrl":"https://doi.org/10.4236/CS.2016.713347","url":null,"abstract":"This paper deals with the removal of noise and base wander in the transfer of ECG data from the patients to the doctor. The process of the project is receiving ECG signals from the patient and reading the data in PC using an Arduino (an open-source electronics prototyping platform based on flexible, easy-to-use hardware and software) board, and then the signal is subjected to the removal of noise and base wander by amplification circuits in LabView (a system design software) software. Thus obtained ECG signal is sent to the doctors using an Ethernet cable or LAN connection. This enables the doctors to monitor any number of patients more accurately by sitting in a single room.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70468254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Inverter Power Stage Connected with PV-Grid","authors":"K. Kirubasankar, A. Kumar","doi":"10.4236/CS.2016.713339","DOIUrl":"https://doi.org/10.4236/CS.2016.713339","url":null,"abstract":"This paper focuses on the \u0000design of the inverter power stage connected with PV-grid which supports the \u0000contrived PV system. The increased number of grid connected photovoltaic (PV) \u0000inverters gave rise to problems concerning the stability and safety of the \u0000utility grid, as well as power quality issues. The proposed systems can overcome these issues and \u0000improve standard regulation methods for gird connected PV inverter. The maximum \u0000available voltage in the PV string is tracked by the power stage which has been \u0000planned and designed in such a way. The tracked voltage is boosted then. The \u0000important components to voltage source inverter (VSI) are boost inductor and \u0000input capacitor which are calculated. To get a clear sinusoidal output phase \u0000voltage of 230 V from \u0000a DC capacitance bus projected to deal with 400 V, the important inverter \u0000stage parameters have been planned and modeled in Mat lab. Each block stage of \u0000the converter is easily understandable by the Simlink of the dual stage DC-AC \u0000converter explanation. The control schemes which have been proposed would \u0000compromise with the inverter power stage which forms the neat grid system. The \u0000existing renewable energy sources in the laboratory are integrated by the \u0000proposed control.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70467749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Two-Dimensional Finite Element Method Analysis Effect of the Recombination Velocity at the Grain Boundaries on the Characteristics of a Polycrystalline Silicon Solar Cell","authors":"Nzonzolo, D. Lilonga-Boyenga, Camille Nziengui Mabika, G. Sissoko","doi":"10.4236/CS.2016.713344","DOIUrl":"https://doi.org/10.4236/CS.2016.713344","url":null,"abstract":"To take into account the variation of the recombination velocity at the grain boundaries, we present in this paper a new approach of characterization of the solar cells, based on the two dimensional finite element method. The results of this study on a bifacial polycrystalline silicon solar cell, modelled in the rectangular form, highlighting the effects of the boundary recombination velocity (Sgb) on the solar cell electrical parameters. The photogenerated excess carrier’s density, the photocurrent density; the phototovoltage and the current-voltage characteristics are analyzed, namely. A good agreement with the results given in the literature is observed.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70467770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Current-Controlled CFTA Based Fractional Order Quadrature Oscillators","authors":"Tada Comedang, P. Intani","doi":"10.4236/CS.2016.713345","DOIUrl":"https://doi.org/10.4236/CS.2016.713345","url":null,"abstract":"This paper presents a study of fractional order quadrature oscillators based on current-controlled current follower transconductance amplifiers (CCCFTA). The design realisation and performance of the fractional order quadrature oscillators have been presented. The quadrature oscillators are constructed using three fractional capacitors of orders α = 0.5. The fractional capacitor is not available on the market or in the PSPICE program. Fortunately, the fractional capacitor can be realised by using the approximate method for the RC ladder network approximation. The oscillation frequency and oscillation condition can be electronically/orthogonally controlled via input bias currents. Due to high-output impedances, the proposed circuit enables easy cascading in current-mode (CM). The PSPICE simulation results are depicted, and the given results agree well with the anticipated theoretical outcomes.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70468430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Power Analysis of Sensor Node Using Simulation Tool","authors":"R. Sittalatchoumy, R. Kanthavel, R. Seetharaman","doi":"10.4236/CS.2016.713348","DOIUrl":"https://doi.org/10.4236/CS.2016.713348","url":null,"abstract":"Power consumption of sensor node is analyzed in this paper. \u0000In order to analyze the energy consumption, the node model is simulated using \u0000Proteus Software tool. The proposed sensor node’s power characteristics are measured by using different combinations of microprocessors \u0000and sensors. Using this, the energy consumption of the node is calculated. This \u0000is a cost-effective method and provides appropriate power model for specific applications.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70468346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Comparative Methodical Assessment of Established MOSFET Threshold Voltage Extraction Methods at 10-nm Technology Node","authors":"Yashu Swami, Sanjeev Rai","doi":"10.4236/CS.2016.713349","DOIUrl":"https://doi.org/10.4236/CS.2016.713349","url":null,"abstract":"Threshold voltage (VTH) is the most evocative aspect of MOSFET operation. It is the crucial device constraint to model on-off transition characteristics. Precise VTH value of the device is extracted and evaluated by several estimation techniques. However, these assessed values of VTH diverge from the exact values due to various short channel effects (SCEs) and non-idealities present in the device. Numerous prevalent VTH extraction methods are discussed. All the results are verified by extensive 2-D TCAD simulation and confirmed through analytical results at 10-nm technology node. Aim of this research paper is to explore and present a comparative study of largely applied threshold extraction methods for bulk driven nano-MOSFETs especially at 10-nm technology node along with various sub 45-nm technology nodes. Application of the threshold extraction methods to implement noise analysis is briefly presented to infer the most appropriate extraction method at nanometer technology nodes.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2016-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70468452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}